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參數(shù)資料
| 型號： | L29C525 |
| 廠商： | Logic Devices Incorporated |
| 英文描述： | Dual Pipeline Register |
| 中文描述： | 雙管道注冊 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 172K |
| 代理商： | L29C525 |
DEVICES INCORPORATED
L29C525
Dual Pipeline Register
Pipeline Registers
03/27/2000–LDS.29C525-G
4
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
1234567890123456789012345678901
L29C525–
20
15
Symbol
t
PD
Parameter
Clock to Output Delay
Min
Max
20
Min
Max
15
t
SEL
t
PW
t
SD
t
HD
t
SI
t
HI
t
ENA
t
DIS
Select to Output Delay
Clock Pulse Width
Data Setup Time
Data Hold Time
Instruction Setup Time
Instruction Hold Time
Three-State Output Enable Delay
(Note 11)
Three-State Output Disable Delay
(Note 11)
20
15
12
10
5
0
5
2
7
0
7
2
15
13
15
13
C
OMMERCIAL
O
PERATING
R
ANGE
(0°C to +70°C)
Notes 9, 10 (ns)
SWITCHING CHARACTERISTICS
M
ILITARY
O
PERATING
R
ANGE
(–55°C to +125°C)
Notes 9, 10 (ns)
Symbol
t
PD
Parameter
Clock to Output Delay
t
SEL
t
PW
t
SD
t
HD
t
SI
t
HI
t
ENA
t
DIS
Select to Output Delay
Clock Pulse Width
Data Setup Time
Data Hold Time
Instruction Setup Time
Instruction Hold Time
Three-State Output Enable Delay
(Note 11)
Three-State Output Disable Delay
(Note 11)
S
WITCHING
W
AVEFORMS
HIGH IMPEDANCE
t
SD
CLK
OE
t
HI
Y
7-0
D
7-0
I
1-0
S
3-0
t
SI
t
HD
t
PW
t
PW
t
SEL
t
PD
t
DIS
t
ENA
1234567890123456789
1234567890123456789
1234567890123456789
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L29C525JC15 | Dual Pipeline Register |
| L29C525JC20 | Dual Pipeline Register |
| L2N3904 | General Purpose Transistors NPN Silicon |
| L2N5401 | Amplifier Transistors PNP Silicon |
| L2N7002LT1 | Small Signal MOSFET 115 mAmps, 60 Volts |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L29C525CC15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Pipeline Register |
| L29C525CC20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Pipeline Register |
| L29C525CM20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Pipeline Register |
| L29C525CM25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Pipeline Register |
| L29C525CMB20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Pipeline Register |
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