參數(shù)資料
型號(hào): L640DU12RI
廠商: Advanced Micro Devices, Inc.
英文描述: 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control
中文描述: 64兆位(4個(gè)M x 16位),3.0伏的CMOS只均勻部門閃存與VersatileIO⑩控制記憶
文件頁數(shù): 41/57頁
文件大?。?/td> 885K
代理商: L640DU12RI
January22,2007 22366C6
Am29LV640D/Am29LV641D
39
D A T A S H E E T
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
Parameter
Speed Options
JEDEC
Std.
Description
90R
120R,
121R
Unit
t
AVAV
t
WC
Write Cycle Time (
Note 1
)
Min
90
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
50
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
45
50
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
50
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Word Programming Operation (
Note 2
)
Typ
11
μs
t
WHWH1
t
WHWH1
Accelerated Word Programming Operation (
Note 2
)
Typ
7
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (
Note 2
)
Typ
0.9
sec
t
VHH
V
HH
Rise and Fall Time (
Note 1
)
Min
250
ns
t
VCS
V
CC
Setup Time (
Note 1
)
Min
50
μs
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Max
90
ns
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