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參數(shù)資料
| 型號： | L6566BTR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Multi-mode controller for SMPS |
| 中文描述： | 多模式開關(guān)電源控制器 |
| 文件頁數(shù)： | 10/51頁 |
| 文件大?。?/td> | 401K |
| 代理商： | L6566BTR |
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Pin settings
L6566B
10/51
11
ZCD
Transformer demagnetization sensing input for quasi-resonant operation and OVP
input. The pin is externally connected to the transformer’s auxiliary winding through
a resistor divider. A negative-going edge triggers MOSFET’s turn-on if QR mode is
selected.
A voltage exceeding 5V shuts the IC down and brings its consumption to a lower
value (OVP). Latch-off or auto-restart mode is selectable externally. This function is
strobed and digitally filtered to increase noise immunity.
12
MODE/SC
Operating mode selection. If the pin is connected to the VREF pin (7) Quasi-
resonant operation is selected, the oscillator (pin 13, OSC) determines the
maximum allowed operating frequency.
Fixed-frequency operation is selected if the pin is not tied to VREF, in which case
the oscillator determines the actual operating frequency, the maximum allowed
duty cycle is set at 70% min. and the pin delivers a voltage ramp synchronized to
the oscillator when the gate-drive output is high; the voltage delivered is zero while
the gate-drive output is low. The pin is to be connected to pin CS (7) via a resistor
for slope compensation.
13
OSC
Oscillator pin. The pin is an accurate 1 V voltage source, and a resistor connected
from the pin to GND (pin 3) defines a current. This current is internally used to set
the oscillator frequency that defines the maximum allowed switching frequency of
the L6566B, if working in QR mode, or the operating switching frequency if working
in FF mode.
14
SS
Soft-start current source. At start-up a capacitor Css between this pin and GND
(pin 3) is charged with an internal current generator. During the ramp, the internal
reference clamp on the current sense pin (7, CS) rises linearly starting from zero to
its final value, thus causing the duty cycle to increase progressively starting from
zero as well. During soft-start the Adaptive UVLO function and all functions
monitoring pin COMP are disabled. The soft-start capacitor is discharged whenever
the supply voltage of the IC falls below the UVLO threshold. The same capacitor is
used to delay IC’s shutdown (latch-off or auto-restart mode selectable) after
detecting an overload condition (OLP).
15
VFF
Line voltage feedforward input. The information on the converter’s input voltage is
fed into the pin through a resistor divider and is used to change the setpoint of the
pulse-by-pulse current limitation (the higher the voltage, the lower the setpoint).
The linear dynamics of the pin ranges from 0 to 3V. A voltage higher than 3V
makes the IC stop switching. If feedforward is not desired, tie the pin to GND (pin 3)
directly if a latch-mode OVP is not required (see pin 11, ZCD) or through a 10k
min. resistor if a latch-mode OVP is required. Bypass the pin with a capacitor to
GND (pin 3) to reduce noise pick-up.
16
AC_OK
Brownout protection input. A voltage below 0.45V shuts down (not latched) the IC,
lowers its consumption and clears the latch set by latched protections (DIS>4.5V,
SS>6.4V, VFF>6.4V). IC’s operation is re-enabled as the voltage exceeds 0.45V.
The comparator is provided with current hysteresis: an internal 15 μA current
generator is ON as long as the voltage on the pin is below 0.45V and is OFF if this
value is exceeded. Bypass the pin with a capacitor to GND (pin 3) to reduce noise
pick-up. Tie to Vcc with a 220 to 680 k
resistor if the function is not used.
Table 2. Pin functions (continued)
N°
Pin
Function
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