參數(shù)資料
型號： L6611N
廠商： 意法半導(dǎo)體
英文描述： DIGITALLY PROGRAMMABLE SECONDARY HOUSEKEEPING CONTROLLER
中文描述： 數(shù)字可編程控制器二次內(nèi)務(wù)管理
文件頁數(shù)： 21/28頁
文件大?。?/td> 609K
代理商： L6611N
21/28
L6611
4
The IC provides on-board undervoltage and overvoltage protection for 3V3, ±5V, ±12V Main input pins and
Dmon auxiliary input pin. Overcurrent protection is available for 12V and 5V or 3.3V, digitally selectable. The
internal fault logic is illustrated in figure 19.
UNDERVOLTAGE, OVERVOLTAGE, DETECTION AND RELEVANT TIMINGS
Figure 19. Simplified Fault logic
–
Main inputs overvoltage:
whenever one of main outputs (3.3V, +5V, ±12V) is detected as going over-
voltage, MFAULT is latched high (which stops the Main PWM) and PW-OK goes low. Cycling the PS-
ON switch or reducing Vdd below its undervoltage threshold releases the latch. A delay of 6μs is imple-
mented before MFAULT latching.
The OV protection for the 12V and 5V outputs can be disabled (see "On board trimming and mode op-
erating" section).
–
Main inputs undervoltage:
when an undervoltage on main outputs is detected, MFAULT is latched
high (the Main PWM stops) and PW-OK goes low. The latches are released, by default, cycling the PS-
ON switch or reducing Vdd below its undervoltage threshold (latching mode); optionally, an attempt is
made to restart the supply after of 1 second (bounce mode). The choice depends on the selected mode
(see "On board trimming and mode operating" section).
Debounce logic is implemented for 3.3V and 5V so that an undervoltage condition on these signals has
to last 450μs to be recognized as valid while 6μs debounce logic is implemented for 12V and -12V input
signal. When all main undervoltages are over and ACsns is OK (see the relevant section), PW_OK goes
high after a delay of 250ms.
–
Dmon input overvoltage:
whenever the Dmon input pin is detected as going overvoltage, both
MFAULT and DFAULT are latched high. The latch is released by reducing Vdd below its undervoltage
threshold. Debounce logic is implemented so that MFAULT and DFAULT signals are latched only if the
overvoltage condition lasts more than 6μs.
To protect the load against overvoltage, typical solutions make use of a power crowbar (SCR) driven by
Delay 1s
Clock
Out
Reset
Debounce 75ms
Clock
In
Reset
Out
PS-ON
Restart Mode
Vdd
Vdd_OV
Vdd_UVL
ON
Clock
Reset
UVB 64ms
In
Out
Clock
Reset
UVB 64ms
In
Out
Dmon_UV
Dmon_OV
ACsense
Vref
Main_OV
Reset
Clock
In
Out
Debounce 6
μ
s
Reset
Clock
In
Out
Reset
Clock
In
Out
Latch
R
S
Q
Clock
In
Reset
Out
Delay 250ms
Delay 2.5ms
Reset
Out
Clock
In
Vdd
PW-OK
Cout
Latch
R
S
Q
Latch
R
S
Q
Dfault
Vdd
Mfault
Latch
R
S
Q
Vdd
Vdd
Vdd
D_UVB
Reset
Reset
Clock
In
Out
Reset
Reset
Reset
Reset
Reset
Reset
Reset
Reset
Reset
Reset
Reset
Clock
In
Out
+/-12V_Main_UV
+3V3 +5V_Main_UV
Debounce 6
μ
s
Debounce 500
μ
s
Debounce 500
μ
s
Debounce 6
μ
s
+
In
相關(guān)PDF資料
PDF描述
L6615 HIGH/LOW SIDE LOAD SHARE CONTROLLER
L6615D HIGH/LOW SIDE LOAD SHARE CONTROLLER
L6615DTR HIGH/LOW SIDE LOAD SHARE CONTROLLER
L6615N HIGH/LOW SIDE LOAD SHARE CONTROLLER
L6660 MILLI-ACTUATOR DRIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
L6615 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH/LOW SIDE LOAD SHARE CONTROLLER
L6615D 功能描述:DC/DC 開關(guān)控制器 H/L Load Share Cont RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
L6615D013TR 功能描述:DC/DC 開關(guān)控制器 H/L Load Share Cont RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
L6615DTR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH/LOW SIDE LOAD SHARE CONTROLLER
L6615N 功能描述:DC/DC 開關(guān)控制器 H/L Load Share Cont RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*