參數(shù)資料
型號: L6710TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: 2 A SWITCHING CONTROLLER, PQFP44
封裝: 10 X 10 MM, 1 MM HEIGHT, TQFP-44
文件頁數(shù): 23/34頁
文件大小: 1610K
代理商: L6710TR
3/34
L6710
PIN FUNCTION
N
Name
Description
1
N.C.
Not internally bonded.
2
N.C.
Not internally bonded.
3
BOOT1
Channel 1 HS driver supply. This pin supplies the relative high side driver.
Connect through a capacitor (100nF typ.) to the PHASE1 pin and through a diode to VCC
(cathode vs. boot).
4
N.C.
Not internally bonded.
5
VCC
Device supply voltage. The operative supply voltage is 12V ±15%.
Filter with 1
F (Typ.) capacitor vs. GND.
6,7
SGND
All the internal references are referred to this pin. Connect it to the PCB signal ground.
8
COMP
This pin is connected to the error amplifier output and is used to compensate the control
feedback loop.
9
FB
This pin is connected to the error amplifier inverting input and is used to compensate the
voltage control feedback loop.
A current proportional to the sum of the current sensed in both channel is sourced from this
pin (50
A at full load, 70A at the Constant Current threshold). Connecting a resistor
between this pin and VSEN pin allows programming the droop effect.
10,11
N.C.
Not internally bonded.
12
REF_OUT
Reference voltage output used for voltage regulation.
The pin is protected against short circuit vs. ground.
Filter to SGND with 47nF ceramic capacitor.
13
VSEN
Manages Over&Under-voltage conditions and the PGOOD signal. It is internally connected
with the output of the Remote Sense Buffer for Remote Sense of the regulated voltage.
If no Remote Sense is implemented, connect it directly to the regulated voltage in order to
manage OVP, UVP and PGOOD.
Connecting 1nF capacitor max vs. SGND can help in reducing noise injection.
14
OUTEN
Output Enable pin. Internally 3V pulled-up.
If forced to a voltage lower than 0.4V, the device stops operation with all mosfets and
protections OFF. Setting the pin free, the device re-start operations.
Filter with 1nF capacitor vs. SGND to avoid noise injection.
15, 16
N.C.
Not internally bonded.
17
FBR
Remote sense buffer non-inverting input. It has to be connected to the positive side of the
load to perform a remote sense.
If no remote sense is implemented, connect directly to the output voltage (in this case
connect also the VSEN pin directly to the output regulated voltage).
18
FBG
Remote sense buffer inverting input. It has to be connected to the negative side of the load
to perform a remote sense.
Pull-down to ground if no remote sense is implemented.
19
ISEN1
Channel 1 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet RdsON. This pin has to be connected to the low-side mosfet drain
or to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS net in order to couple in common mode any picked-up noise.
20
PGNDS
Common Power Ground sense pin. The net connecting the pin to the sense point must be
routed as close as possible to the ISENx net in order to couple in common mode any picked-
up noise.
21
ISEN2
Channel 2 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet RdsON. This pin has to be connected to the low-side mosfet drain
or to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS net in order to couple in common mode any picked-up noise.
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