參數(shù)資料
型號(hào): LA4032V-75TN44E
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 21/42頁(yè)
文件大?。?/td> 0K
描述: IC CPLD 32MACROCELLS 44TQFP
標(biāo)準(zhǔn)包裝: 160
系列: LA-ispMACH
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
宏單元數(shù): 32
輸入/輸出數(shù): 30
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤
Lattice Semiconductor
LA-ispMACH 4000V/Z Automotive Family Data Sheet
28
LA-ispMACH 4000V/Z Power Supply and NC Connections
1
Signal
44 TQFP
2
48 TQFP
2
100 TQFP
2
128 TQFP
2
144 TQFP
2
VCC
11, 33
12, 36
25, 40, 75, 90
32, 51, 96, 115
36, 57, 108, 129
VCCO0
VCCO (Bank 0)
6
13, 33, 95
3, 17, 30, 41, 122
3, 19, 34, 47, 136
VCCO1
VCCO (Bank 1)
28
30
45, 63, 83
58, 67, 81, 94, 105
64, 75, 91, 106, 119
GND
12, 34
13, 37
1, 26, 51, 76
1, 33, 65, 97
1, 37, 73, 109
GND (Bank 0)
5
7, 18, 32, 96
10, 24, 40, 113, 123
10, 18
6, 27, 46, 127,
137
GND (Bank 1)
27
29
46, 57, 68, 82
49, 59, 74, 88, 104
55, 65, 82, 90
6, 99,
118
NC
None
17, 20, 38, 45, 72,
89, 92, 110, 117,
144
1. All grounds must be electrically connected at the board level. However, for the purposes of I/O current loading, grounds are associated with
the bank shown.
2. Pin orientation follows the conventional order from pin 1 marking of the top side view and counter-clockwise.
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LA4032V-75TN48E 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) ispMACH4032V RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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LA4032ZC-75TN128E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LA4032ZC-75TN144E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LA4032ZC-75TN44E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs