參數(shù)資料
型號(hào)： LAMXO640C-3FTN256E
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 34/77頁
文件大?。?/td> 0K
描述： IC FPGA 640LUTS 256TQFP
標(biāo)準(zhǔn)包裝： 90
系列： LA-MachXO
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1)： 4.9ns
電壓電源 - 內(nèi)部： 1.71 V ~ 3.465 V
宏單元數(shù)： 320
輸入/輸出數(shù)： 159
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 256-LBGA
供應(yīng)商設(shè)備封裝： 256-FTBGA（17x17）
包裝： 托盤
February 2007
Data Sheet DS1003
2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specications and information herein are subject to change without notice.
www.latticesemi.com
2-1
DS1003 Architecture_01.2
Architecture Overview
The LA-MachXO family architecture contains an array of logic blocks surrounded by Programmable I/O (PIO).
Some devices in this family have sysCLOCK PLLs and blocks of sysMEM Embedded Block RAM (EBRs). Fig-
ures 2-1, 2-2, and 2-3 show the block diagrams of the various family members.
The logic blocks are arranged in a two-dimensional grid with rows and columns. The EBR blocks are arranged in a
column to the left of the logic array. The PIO cells are located at the periphery of the device, arranged into Banks.
The PIOs utilize a exible I/O buffer referred to as a sysIO interface that supports operation with a variety of inter-
face standards. The blocks are connected with many vertical and horizontal routing channel resources. The place
and route software tool automatically allocates these routing resources.
There are two kinds of logic blocks, the Programmable Functional Unit (PFU) and the Programmable Functional
unit without RAM (PFF). The PFU contains the building blocks for logic, arithmetic, RAM, ROM, and register func-
tions. The PFF block contains building blocks for logic, arithmetic, ROM, and register functions. Both the PFU and
PFF blocks are optimized for exibility, allowing complex designs to be implemented quickly and effectively. Logic
blocks are arranged in a two-dimensional array. Only one type of block is used per row.
In the LA-MachXO family, the number of sysIO Banks varies by device. There are different types of I/O Buffers on
different Banks. See the details in later sections of this document. The sysMEM EBRs are large, dedicated fast
memory blocks; these blocks are found only in the larger devices. These blocks can be congured as RAM, ROM
or FIFO. FIFO support includes dedicated FIFO pointer and ag “hard” control logic to minimize LUT use.
The LA-MachXO architecture provides up to two sysCLOCK Phase Locked Loop (PLL) blocks on larger devices.
These blocks are located at either end of the memory blocks. The PLLs have multiply, divide, and phase shifting
capabilities that are used to manage the frequency and phase relationships of the clocks.
Every device in the family has a JTAG Port that supports programming and conguration of the device as well as
access to the user logic. The LA-MachXO devices are available for operation from 3.3V, 2.5V, 1.8V, and 1.2V power
supplies, providing easy integration into the overall system.
LA-MachXO Automotive Family Data Sheet
Architecture
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LAMXO640C-3TN100E 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) MachXO640C RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
LAMXO640C-3TN144E 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) MachXO640C RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
LAMXO640E 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LA-MachXO Automotive Family Data Sheet
LAMXO640E-3FTN256E 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) MachXO640E RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
LAMXO640E-3TN100E 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) MachXO640E RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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