參數(shù)資料
型號(hào): LAN9115-MT
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: HIGHLY EFFICIENT SINGLE - CHIP 10/100 NON PCI ETHERNET CONTROLLER
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: GREEN, TQFP-100
文件頁數(shù): 3/7頁
文件大?。?/td> 219K
代理商: LAN9115-MT
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
SMSC LAN9115
3
Revision 0.1 (12-20-04)
PRODUCT PREVIEW
General Description
The LAN9115 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded
applications where performance, flexibility, ease of integration and system cost control are required.
The LAN9115 has been architected to provide the best price-performance ratio for any 16-bit
application with medium performance requirements. The LAN9115 is fully IEEE 802.3 10BASE-T and
802.3u 100BASE-TX compliant.
The LAN9115 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave
interface. The simple, yet highly functional host bus interface provides a glue-less connection to most
common 16-bit microprocessors and micro controllers. LAN9115 includes large transmit and receive
data FIFO’s to accommodate bandwidth-intensive and high-latency applications. In addition, the
LAN9115 memory buffer architecture allows the most efficient use of memory resources by optimizing
packet granularity.
Applications
The LAN9115 is well suited for many medium-performance embedded applications, including:
Printers, kiosks, POS terminals and security systems
Audio distribution systems
General embedded systems
Basic cable, satellite and IP set-top boxes
Voice-over-IP solutions
Basic Cable, satellite, and IP set-top boxes
The LAN9115 supports numerous power management and wakeup features. The LAN9115 can be
placed in a reduced power mode and can be programmed to issue an external wake signal via several
methods, including Magic Packet, Wake on LAN and Link Status Change. This signal is ideal for
triggering system power-up using remote Ethernet wakeup events. The device can be removed from
the low power state via a host processor command.
The LAN9115 also supports features which reduce or eliminate packet loss. Its internal 16Kbyte SRAM
can hold over 200 received packets. If the receive FIFO gets too full, the LAN9115 can automatically
generate flow control packets to the remote node, or assert back-pressure on the remote node by
generating a network collision.
The diagram shown in Figure 1, "System Block Diagram utilizing the SMSC LAN9115", describes a
typical system configuration of the LAN9115 in a typical embedded environment.
The LAN9115 is designed to be general purpose Ethernet controller that is platform independent. The
LAN9115 consists of four major functional blocks. The four blocks are:
1. 10/100 Ethernet PHY
2. 10/100 Ethernet MAC
3. RX/TX FIFO’s
4. Slave Interface Module
相關(guān)PDF資料
PDF描述
LAN9116 Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
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