參數(shù)資料
型號: LAN9117-MD
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 17/131頁
文件大?。?/td> 1531K
代理商: LAN9117-MD
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9117
17
Revision 1.1 (05-17-05)
DATASHEET
Table 2.5 System and Power Signals
PIN
NO.
NAME
SYMBOL
BUFFER
TYPE
NUM
PINS
DESCRIPTION
6
Crystal 1
XTAL1
lclk
1
External 25MHz Crystal Input.
Can also be connected to single-
ended TTL oscillator. If this method is
implemented, XTAL2 should be left
unconnected.
5
Crystal 2
XTAL2
Oclk
1
External 25MHz Crystal output.
95
Reset
nRESET
IS
(PU)
1
Active-low reset input. Resets all
logic and registers within the
LAN9117
This signal is pulled high
with a weak internal pull-up
resistor. If nRESET is left
unconnected, the
LAN9117
will
rely on its internal power-on reset
circuitry
Note:
The LAN9117 must always
be read at least once after
power-up, reset, or upon
return from a power-saving
state or write operations will
not function. See
Section
3.11, "Detailed Reset
Description," on page 41
for
additional information
70
Wakeup Indicator
PME
O8/OD8
1
When programmed to do so, is
asserted when the LAN9117 detects
a wake event and is requesting the
system to wake up from the
associated sleep state. The polarity
and buffer type of this signal is
programmable.
Note:
Detection of a Power
Management Event, and
assertion of the PME signal
will not wakeup the
LAN9117. The LAN9117 will
only wake up when it
detects a host write cycle
(assertion of nCS and
nWR). Although any write to
the LAN9117, regardless of
the data written, will wake-
up the device when it is in a
power-saving mode, it is
required that the
BYTE_TEST register be
used for this purpose.
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