參數(shù)資料
型號： LAN9117-MT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 微控制器/微處理器
英文描述： HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝： ROHS COMPLIANT, TQFP-100
文件頁數(shù)： 100/131頁
文件大小： 1531K
代理商： LAN9117-MT
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
100
SMSC LAN9117
DATASHEET
is loaded from address 0x05 of the EEPROM. The second byte (bits [15:8]) is loaded from address
0x06 of the EEPROM. Please refer to
Section 4.6
for more information on the EEPROM. Section
5.4.3
details the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the
Ethernet physical address.
5.4.3
ADDRL—MAC Address Low Register
The MAC Address Low register contains the lower 32 bits of the physical address of the MAC. The
contents of this register are optionally loaded from the EEPROM at power-on through the EEPROM
Controller if a programmed EEPROM is detected. The least significant byte of this register (bits [7:0])
is loaded from address 0x01 of the EEPROM. The most significant byte of this register is loaded from
address 0x04 of the EEPROM. Please refer to
Section 4.6
for more information on the EEPROM.
Table 5.7
below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the
reception of the Ethernet physical address. Also shown is the correlation between the EEPROM
addresses and ADDRL and ADDRH registers.
BITS
DESCRIPTION
31-16
Reserved
15-0
Physical Address [47:32].
This field contains the upper 16-bits (47:32) of the Physical Address of
the LAN9117 device. The content of this field is undefined until loaded from the EEPROM at power-
on. The host can update the contents of this field after the initialization process has completed.
Offset:
3
Attribute:
R/W
Default Value:
FFFFFFFFh
Size:
32 bits
BITS
DESCRIPTION
31-0
Physical Address [31:0].
This field contains the lower 32 bits (31:0) of the Physical Address of the
LAN9117 device. The content of this field is undefined until loaded from the EEPROM at power-on.
The host can update the contents of this field after the initialization process has completed.
Table 5.7 ADDRL, ADDRH and EEPROM Byte Ordering
EEPROM ADDRESS
ADDRN
ORDER OF RECEPTION ON
ETHERNET
0x01
ADDRL[7:0]
1
st
0x02
ADDRL[15:8]
2
nd
0x03
ADDRL[23:16]
3
rd
0x04
ADDRL[31:24]
4
th
0x05
ADDRH[7:0]
5
th
0x06
ADDRH[15:8]
6
th
相關(guān)PDF資料
PDF描述
LAN9118 HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN9118-MD HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN9118-MT HIGH PERFORMANCE SINGLE CHIP 10/100NON PCI ETHERNET CONTROLLER
LAN91C100-FD-SS FEAST Fast Ethernet Controller with Full Duplex Capability
LAN91C100-FD FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LAN9118 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_05 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118_07 制造商:SMSC 制造商全稱:SMSC 功能描述:High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
LAN9118-MD 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN9118-MT 功能描述:以太網(wǎng) IC Ethernet IC 32bit High Performance RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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