參數(shù)資料
型號(hào): LAN91C100FDREVD
廠商: SMSC Corporation
英文描述: FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
中文描述: 宴快速以太網(wǎng)控制器以全雙工能力
文件頁(yè)數(shù): 10/79頁(yè)
文件大小: 585K
代理商: LAN91C100FDREVD
FEAST Fast Ethernet Controller with Full Duplex Capability
Rev.
10/14/2002
Page 10
SMSC DS – LAN91C100FD Rev. D
PRELIMINARY
PQFP/TQFP
PIN NO.
201
NAME
SYMBOL
BUFFER
TYPE
O4
DESCRIPTION
Transmit
Data
Carrier
Sense
TXD
Output. NRZ Transmit Data for 10 Mbps
ENDEC interface.
Input. Carrier sense from 10 Mbps ENDEC
interface. This pin is ignored when MIISEL is
high.
Input. Collision detection indication from 10
Mbps ENDEC interface. This pin is ignored
when MIISEL is high.
Input. NRZ Receive Data from 10 Mbps ENDEC
interface. This pin is ignored when MIISEL is
high.
Input. 10 MHz transmit clock used in 10 Mbps
operation. This pin is ignored when MIISEL is
high.
Input. 10 MHz receive clock recovered by the 10
Mbps ENDEC. This pin is ignored when MIISEL
is high.
Output. Active when LOOP bit is set (TCR bit 1).
Independent of port selection (MIISEL=X).
Input. General purpose input port used to
convey LINK status (EPHSR bit 14).
Independent of port selection (MIISEL=X).
Output. Non volatile output pin. Driven by
inverse of FULLSTEP (CONFIG bit 10).
Independent of port selection (MIISEL=X).
Output. Non volatile output pin. Driven by MII
SELECT (CONFIG bit 15). High indicates the
MII port is selected, low indicates the 10 Mbps
ENDEC is selected.
Output. Non volatile output pin. Driven by AUI
SELECT (CONFIG bit 8). Independent of port
selection (MIISEL= X).
Output to MII PHY. Envelope to 100 Mbps
transmission. This pin stays low if MIISEL is low.
208
CRS
I with
pulldown
207
Collision
Detect
COL
I with
pulldown
206
Receive
Data
RXD
I with
pullup
197
Transmit
Clock
TXC
I with
pullup
199
Receive
Clock
RXC
I with
pullup
202
Loopback
LBK
O4
1
nLink
Status
nLNK
I with
pullup
195
nFullstep
nFSTEP
O4
6
MII Select
MIISEL
O4
194
AUI Select
AUISEL
O4
30
Transmit
Enable
100 Mbps
Carrier
Sense 100
Mbps
TXEN100
O12
19
CRS100
I with
pulldown
Input from MII PHY. Envelope of packet
reception used for deferral and backoff
purposes. This pin is ignored when MIISEL is
low.
Input from MII PHY. Envelope of data valid
reception. Used for receive data framing. This
pin is ignored when MIISEL is low.
Input from MII PHY. Collision detection input.
This pin is ignored when MIISEL is low.
12
Receive
Data Valid
RX_DV
I with
pulldown
18
Collision
Detect
100 Mbps
Transmit
Data
Transmit
Clock
COL100
I with
pulldown
25, 26, 28,
29
9
TXD0-
TXD3
TX25
O12
Outputs. Transmit Data nibble to MII PHY.
I with
pullup
Input. Transmit clock input from MII. Nibble rate
clock (25 MHz). This pin is ignored when
MIISEL is low.
Input. Receive clock input from MII PHY. Nibble
rate clock. This pin is ignored when MIISEL is
low.
17
Receive
Clock
RX25
I with
pullup
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