參數(shù)資料
型號(hào)： LAN91C100FDREVD
廠商： SMSC Corporation
英文描述： FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
中文描述： 宴快速以太網(wǎng)控制器以全雙工能力
文件頁(yè)數(shù)： 7/79頁(yè)
文件大?。?/td> 585K
代理商： LAN91C100FDREVD
FEAST Fast Ethernet Controller with Full Duplex Capability
SMSC DS – LAN91C100FD Rev. D
Page 7
Rev.
10/14/2002
PRELIMINARY
Chapter 3 Description of Pin Functions
PQFP/TQFP
PIN NO.
148-159
NAME
SYMBOL
BUFFER
TYPE
I
DESCRIPTION
Address
A4-A15
Input. Decoded by LAN91C100FD to determine
access to its registers.
Input. Used by LAN91C100FD for internal
register selection.
Input. Used as an address qualifier. Address
decoding is only enabled when AEN is low.
Input. Used during LAN91C100FD register
accesses to determine the width of the access
and the register(s) being accessed. nBE0-nBE3
are ignored when nDATACS is low (burst
accesses) because 32 bit transfers are
assumed.
Bidirectional. 32 bit data bus used to access the
LAN91C100FD’s internal registers. Data bus
has weak internal pullups. Supports direct
connection to the system bus without external
buffering. For 16 bit systems, only D0-D15 are
used.
145-147
Address
A1-A3
I
193
Address
Enable
nByte
Enable
AEN
I
160-163
nBE0-
nBE3
I
173-170,
168-166,
164, 144,
142-139,
137-135,
133,
131-129,
127, 126,
124, 123,
121, 118,
117,
115-112,
110
182
Data Bus
D0-D31
I/O24
Reset
RESET
IS
Input. This input is not considered active unless
it is active for at least 100ns to filter narrow
glitches.
Input. For systems that require address latching,
the rising edge of nADS indicates the latching
moment for A1-A15 and AEN. All
LAN91C100FD internal functions of A1-A15,
AEN are latched except for nLDEV decoding.
Input. This active low signal is used to control
LAN91C100FD EISA burst mode synchronous
bus cycles.
Input. Defines the direction of synchronous
cycles. Write cycles when high, read cycles
when low.
Input. When low, the LAN91C100FD
synchronous bus interface is configured for VL
Bus accesses. Otherwise, the LAN91C100FD is
configured for EISA DMA burst accesses. Does
not affect the asynchronous bus interface.
Input. Used to interface synchronous buses.
Maximum frequency is 50 MHz. Limited to 8.33
MHz for EISA DMA burst mode.
95
nAddress
Strobe
nADS
IS
183
nCycle
nCYCLE
I
184
Write/
nRead
W/nR
IS
181
nVL Bus
Access
nVLBUS
I with
pullup
105
Local Bus
Clock
LCLK
I
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LAN91C100-FD-SS 制造商:SMSC 制造商全稱(chēng):SMSC 功能描述:FEAST Fast Ethernet Controller with Full Duplex Capability
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LAN91C100-FD-ST 制造商:SMSC 制造商全稱(chēng):SMSC 功能描述:FEAST Fast Ethernet Controller with Full Duplex Capability
LAN91C100FD-ST 功能描述:以太網(wǎng) IC Non-PCI 10/100 Ethernet MAC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
LAN91C100FDTQFP 功能描述:以太網(wǎng) IC Non-PCI 10/100 Ethernet MAC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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