參數(shù)資料
型號(hào): LC5512MV-45FN484C
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 19/99頁(yè)
文件大?。?/td> 0K
描述: IC CPLD 512MACROCELLS 484FPBGA
標(biāo)準(zhǔn)包裝: 60
系列: ispXPLD® 5000MV
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 4.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 253
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
包裝: 托盤
其它名稱: 220-1726
LC5512MV-45FN484C-ND
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
22
Absolute Maximum Ratings
1, 2, 3
ispXPLD 5000MC
ispXPLD 5000MB/V
1.8V
2.5V/3.3V
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.5V . . . . . . . . . . . . . . . . -0.5 to 5.5V
PLL Supply Voltage (VCCP) . . . . . . . . . . . . . . . . . . -0.5 to 2.5V . . . . . . . . . . . . . . . . -0.5 to 5.5V
Output Supply Voltage (VCCO) . . . . . . . . . . . . . . . . -0.5 to 4.5V . . . . . . . . . . . . . . . . -0.5 to 4.5V
IEEE 1149.1 TAP Supply Voltage (VCCJ) . . . . . . . . -0.5 to 4.5V . . . . . . . . . . . . . . . . -0.5 to 4.5V
Input Voltage Applied
4, 5 . . . . . . . . . . . . . . . . . . . . . -0.5 to 5.5V . . . . . . . . . . . . . . . . -0.5 to 5.5V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65 to 150
C . . . . . . . . . . . . . . . -65 to 150C
Junction Temperature (TJ) with Power Applied . . . -55 to 150C . . . . . . . . . . . . . . . -55 to 150C
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, following the programming specifications).
2. Compliance with the Lattice Thermal Management document is required.
3. All voltages referenced to GND.
4. Overshoot and Undershoot of -2V to (VIHMAX +2) volts not to exceed 6V is permitted for a duration of <20ns.
5. A maximum of 64 I/Os per device with VIN > 3.6V is allowed.
Recommended Operating Conditions
E
2CMOS Erase Reprogram Specifications
Hot Socketing Characteristics
1, 2, 3, 4
Symbol
Parameter
Min.
Max.
Units
VCC
Supply Voltage for 1.8V Devices (ispXPLD 5000MC)
1.65
1.95
V
Supply Voltage for 2.5V Devices (ispXPLD 5000MB)
2.3
2.7
V
Supply Voltage for 3.3V Devices (ispXPLD 5000MV)
3
3.6
V
VCCP
PLL Block Supply Voltage for PLL 1.8V Devices
1.65
1.95
V
PLL Block Supply Voltage for PLL 2.5V Devices
2.3
2.7
V
PLL Block Supply Voltage for PLL 3.3V Devices
3
3.6
V
TJ
Junction Temperature (Commercial Operation)
0
90
C
Junction Temperature (Industrial Operation)
-40
105
C
Parameter
Min.
Max.
Units
Erase/Reprogram Cycle
1
1,000
Cycles
1. Valid over commercial temperature range.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
IDK
Input or I/O Leakage Current
0 VIN 3.0V
+/-50
+/-800
A
1. Insensitive to sequence of VCC and VCCO when VCCO 1.0V. For VCCO > 1.0V, VCC min must be present. However, assumes monotonic
rise/fall rates for VCC and VCCO, provided (VIN - VCCO) 3.6V.
2. 0 VCC VCC (MAX), 0 VCCO VCCO (MAX)
3. IDK is additive to IPU, IPD or IBH. Device defaults to pull-up until non-volatile cells are active.
4. LVTTL, LVCMOS only.
SELECT
DEVICES
DISCONTINUED
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