參數(shù)資料
型號: LC5512MV-45QN208C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 82/99頁
文件大?。?/td> 0K
描述: IC CPLD 512MACROCELLS 208PQFP
標準包裝: 24
系列: ispXPLD® 5000MV
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 4.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 149
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
79
1
15N
C0
A31
C31
C1
W5
1
16P
E30/DATA0
G0
E0
E31
W1
1
16N
E28/DATA1
G1
E1
E29
Y1
1
17P
E26/DATA2
G2
E2
E27
P3
V6
1
17N
E24/DATA3
G3
E3
E25
R3
W6
1
18P
E22/DATA4
G4
E4
E23
T2
Y2
1
18N
E20/DATA5
G5
E5
E21
U2
Y3
-
GND (Bank 1)
-
GND (Bank 1) GND (Bank 1)
1
19P
E18/DATA6
G6
E6
E19
V2
Y4
-
VCCO1
-
VCCO1
1
19N
E16/DATA7
G7
E7
E17
W2
Y5
-
GND
-
GND
1
20P
E14/INITB
G8
E8
E15
R4
V7
1
20N
E12/CSB
G9
E9
E13
T4
W7
1
21P
E10/READ
G10
E10
E11
R6
AA1
1
21N
E8/CCLK
G11
E11
E9
R5
AA2
1
22P
E6
-
E7
U3
AA3
-
VCC
-
VCC
1
22N
E4
-
E5
V3
AA4
1
23P
E2
-
E3
Y2
Y6
1
23N
E0
-
E1
W3
AA5
1
24P
F30
H0
-
F31
U5
AB2
1
24N
F28
H2
-
F29
T5
AB3
-
GND (Bank 1)
-
GND (Bank 1) GND (Bank 1)
1
25P
F26
H4
F27
U4
AB4
-
VCCO1
-
VCCO1
1
25N
F24
H6
-
F25
V4
AB5
1
26P
F22
H8
-
F23
AA3
AB1
1
26N
F20
H10
-
F21
AB3
AC2
1
-
F18
H12
-
F19
Y4
AC3
-
DONE
-
AA4
AC4
1
27P
F14
-
F15
AB2
AC1
127N
F12
-
F13
U6
AD1
-
GND (Bank 1)
-
GND (Bank 1) GND (Bank 1)
128P
F10
F11
V5
AD2
-
VCCO1
-
VCCO1
128N
F8
F9
W6
AD3
1
29P
F6
G12
E12
F7
AB4
Y8
1
29N
F4
G13
E13
F5
AB5
Y9
1
30P
F2
G14
E14
F3
T6
AA8
1
30N
F0
G15
E15
F1
U7
AA9
-
PROGRAMB
-
W5
AB8
1
-
G28
H14
-
G29
U8
AB9
ispXPLD 51024MX Logic Signal Connections (Continued)
sysIO
Bank
LVDS Pair
Primary
Macrocell/Function
Alternate Outputs
Alternate
Input
484 fpBGA
Ball Number
672 fpBGA
Ball Number
Macrocell 1
Macrocell 2
SELECT
DEVICES
DISCONTINUED
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