參數(shù)資料
型號: LC72147V
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizer for Electronic Tuning in Car Audio Systems
中文描述: 鎖相環(huán)頻率合成器在汽車音響系統(tǒng)的電子調(diào)諧
文件頁數(shù): 19/22頁
文件大?。?/td> 154K
代理商: LC72147V
Charge pump structure
When the unlocked state is detected when the channel is changed, the PDS (sub-charge pump) operates, R1 goes to
RIM/R1S (R1S = 100
), the low-pass filter time constant is reduced, and PLL locking is accelerated.
*: The unlock state detection bit UL1 must be set to 1. The unlock detection width is set to either ±0.5 μs or ±1.0 μs and
when a phase difference larger than this is detected, the unlocked state is recognized and the sub-charge pump
operates. When the state approaches the locked state and the phase difference becomes less than the amount set as the
unlock detection width, the sub-charge pump stops operating and the pin goes to the high-impedance state.
Other items
(1) Notes on the phase detector dead band
When the charge pump operates in ON/ON mode, the charge pump generates correction pulses even when the PLL is
locked. Here, it is easy for the loop to become unstable, and special care is required in designs that use this mode.
The following problems may occur in ON/ON mode.
Side bands may be generated due to reference frequency leakage.
Side bands may be generated due low-frequency leakage due to the envelope of the correction pulses.
No. 6675-19/22
LC72147V
(MAIN)
(SUB)
R1S
PDS
PD0
fvco/N
Phase
Detector
Unlock
detector
and
subcharge
pump cont
fref
Clock
Unlock
DZ0
UL0
UL1
PDC0
PDC1
DO, I/O-5 pin
DLC
DZ1
AIN
AOUT
AV
SS
PD0
PDS
V
CC
R1M
R1S
Vtune
PDC1 PDC0
PDS (Sub-charge pump state)
0
*
High impedance
1
0
Charge pump operating (PLL unlocked)
1
1
Charge pump operating (normal operation)
DLC
PD1, PD0, PDS
0
Normal operation
1
Forcibly set to the low level
DZ1
DZ0
Dead band mode
Charge pump
Dead band
0
0
DZA
ON/ON
– –0 s
0
1
DZB
ON/ON
–0 s
1
0
DZC
OFF/OFF
+0 s
1
1
DZD
OFF/OFF
++0 s
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