- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄30731 > LC72720Y SPECIALTY CONSUMER CIRCUIT, PDIP24 PDF資料下載
參數(shù)資料
| 型號(hào)： | LC72720Y |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| 封裝： | SDIP-24 |
| 文件頁(yè)數(shù)： | 13/14頁(yè) |
| 文件大?。?/td> | 107K |
| 代理商： | LC72720Y |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)
No. 6488-8/14
LC72720Y, 72720YV
(3) Synchronization and RAM address reset (1 bit): SYR
Initial value: SYR =0
Caution: 1. To apply a synchronization reset, set SYR to 1 temporarily using the CCB, and then set it back to 0 again using the CCB.
The circuit will start synchronization capture operation at the point SYR is set to 0.
2. The SYR pin (pin 24 / 30) also provides an identical reset control operation. Applications can use either method. However, the control
method
that is not used must be set to 0 at all times. Any pulse with a width of over 250 ns will suffice.
3. A reset must be applied immediately after the reception channel is changed. If a reset is not applied, reception data from the previous
channel may remain in memory.
4. Data read out after a synchronization reset is read out starting with the backward protection block data preceding the establishment of
synchronization.
SYR
Synchronization detection circuit
RAM
0
Normal operation (reset cleared)
Normal write (See the description of the OWE bit.)
1
Forced to the unsynchronized state (synchronization reset)
After the reset is cleared, start writing from the data prior to the
establishment of synchronization, i.e. the data in backward protection.
Initial value: OWE = 0
Initial values: EC0 = 0, EC1 = 1, EC2 = 0, EC3 = 0, EC4 = 1
Caution: 1. If soft-decision A or soft-decision B is specified, soft-decision control will be performed even if the number of bits corrected is set to 0 (error
detection only). With these settings, data will be output for blocks with no errors.
2. As opposed to soft-decision B, the soft-decision A setting suppresses soft decision error correction.
(4) RAM write control (1 bit): OWE
(5) Error correction method setting (5 bits): EC0 to EC4
OWE
RAM write conditions
0
Only data for which synchronization had been established is written.
1
Data for which synchronization not has been established (unsynchronized data) is also written. (However, this applies when SYR = 0.)
EEE
Number of
CCC
bits corrected
012
0
0 0 (error detection only)
1
0
1 or fewer bits
0
1
0
2 or fewer bits
1
0
3 or fewer bits
0
1
4 or fewer bits
1
0
1
5 or fewer bits
0
1
Illegal value
1
Illegal value
EE
C C
Soft-decision setting
34
0
Mode 0: Hard decision
1
0
Mode 1: Soft decision A
0
1
Mode 2: Soft decision B
1
Illegal value
(6) Crystal oscillator frequency selection (1 bit): XS
XS = 0: 4.332 MHz
XS = 1: 8.664 MHz
Initial value: XS = 0
(7) Demodulation circuit phase control (2 bits): PL0, PL1
Initial values: PL0 = 0, PL1 = 1
Caution: 1. When PL0 is 0 (normal operation), the IC detects the presence or absence of the ARI signal and reproduces the RDS data by automatically
controlling the demodulation phase with respect to the reproduced carrier. However, the initial phase following a synchronization reset is set
by PL1.
2. If PL0 is set to 1, the demodulation circuit phase is locked according to the PL1 setting at either 90° (PL1 = 0) or 0° (PL1 = 1), allowing RDS
data to be reproduced. When ARI is not present, PL1 should be set to 0, since the RDS data is reproduced by detecting at a phase of 90°
with respect to the reproduced carrier. When ARI is present, PL1 should be set to 1, since detection is at 0°. In cases where the ARI
presence is known in advance, more stable reproduction can be achieved by fixing the demodulation phase in this manner.
PL0
PL1
Demodulation circuit phase control
0
0/1
<Normal operation> when ARI presence or absence is unclear.
1
0
If the circuit determines that the ARI signal is absent: 90° phase
1
If the circuit determines that the ARI signal is present: 0° phase
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC72720YV | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
| LC72720Y | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| LC72720 | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| LC72720M | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| LC72722M | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC72720YV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC72720YVS | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System IC |
| LC72720YVS-MPB-E | 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| LC72720YVS-TLM-E | 功能描述:音頻 DSP RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| LC72720YV-TLM-E | 制造商:ON Semiconductor 功能描述:RDS/RBDS DECODE-IC - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。