參數(shù)資料
型號(hào): LC74794
廠商: Sanyo Electric Co.,Ltd.
英文描述: On-Screen Display Controller LSI(用于屏幕顯示控制器規(guī)模集成電路(LSI))
中文描述: 屏幕顯示控制器芯片(用于屏幕顯示控制器規(guī)模集成電路(LSI)的)
文件頁(yè)數(shù): 2/30頁(yè)
文件大?。?/td> 217K
代理商: LC74794
Pin Assignment
No. 5557-2/30
LC74794, 74794M
Pin Functions
Pin no.
Pin
Function
Notes
1
V
SS
1
Xtal
IN
Ground
Ground connection (digital system ground)
2
Crystal oscillator
(MUTE input)
These pins are used either to connect a crystal and capacitor to form an external crystal
oscillator to generate internal synchronizing signals, or to input an external clock signal (2fsc
or 4fsc). As a mask option, the XtalOUT pin can be set to function as the MUTE input pin.
When the MUTE pin is set low, the video output is held at the pedestal level. (A pull-up
resistor is built in so the input has hysteresis characteristics.)
3
Xtal
OUT
(MUTE)
Switches the mode between external clock input and crystal oscillator operation. A low level
selects crystal oscillator operation and a high level selects external clock input. As a mask
option, the CTRL1 input pin can be set to function as the CHABLK (character · border)
output. This is a 3-value output.
4
CTRL1
(CHABLK) (CHABLK output)
Crystal oscillator input switching
5
CS2
Enable input 2
PDC/VPS data output enable input. Data output is enabled by a low-level input. (A pull-up
resistor is built in so the input has hysteresis characteristics.)
6
SCLK2
Clock input 2
Clock input for PDC/VPS data output
(A pull-up resistor is built in so the input has hysteresis characteristics.)
7
DOUT
Data output
PDC/VPS data output
(This is either an n-channel open-drain output or a CMOS output.)
Outputs the state of the external synchronizing signal presence/absence judgment.
Outputs a high level when synchronizing signals are present.
Outputs the crystal oscillator clock when CS1 is low and RST is low. (This signal is not
output on command resets.)
8
SYNC
JDG
External synchronizing signal judgment
output
Continued on next page.
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