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參數(shù)資料
| 型號： | LC749450NW |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Silicon Gate CMOS IC Digital RGB Image Processor IC |
| 中文描述： | 硅柵CMOS集成電路數(shù)字RGB圖像處理器芯片 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 81K |
| 代理商： | LC749450NW |
No.8096-4/17
LC749450NW
(8) Color exciter
The color exciter can independently control the red, green, blue, magenta, yellow, and cyan colors.
(9) Brightness and contrast controls
The brightness control adjusts the brightness of the screen as a whole and the contrast control adjusts the gain
applied to the brightness.
(10) White balance and black balance adjustments
These adjust the appearance of white and black on the LCD panel.
(11) Gamma correction
This function allows the creation of arbitrary gamma curves to match the characteristics of the LCD panel used.
The RGB channels can be adjusted independently, using internal programmable LUT.
(12) Dithering
The LC749450NW performs internal signal processing with a 10-bit precision. When these signals are output as
8-bit values, the lower two bits are rounded by dithering.
4. Outputs and Other Functions
(1) Matrix conversion
The LC749450NW provides the following matrix conversion functions.
YCbCr
→
RGB
YPbPr
→
RGB
YPbPr
→
YCbCr
RGB
→
YCbCr
(2) Aspect ratio conversion
An input Rec.601 signal (example: 720
×
240) can be expanded in the horizontal direction and displayed on
a WVGA panel.
(3) Output formats
The LC749450NW can output video in the following formats.
Digital RGB (30 or 24 bits)
Digital YCbCr (30 or 24 bits)
(4) Clamp control
The LC749450NW can generate the clamp signals required for the front-end A/D converter. It can also generate
arbitrary pulses (high, low, or high impedance) by comparing with an IC internal threshold value (that can be set
with a register setting).
(5) SDRAM interface
The LC749450NW includes an SDRAM interface that can directly connect either:
Two 16 Mbit SDRAMs (512 words
×
16 bits
×
2 banks)
or
One 64 Mbit SDRAM (512 words
×
32 bits
×
4 banks).
This allows end product systems to be constructed easily.
SDRAMs with a speed grade of 70 or better must be used.
(6) I
2
C bus interface and CPU interface
The LC749450NW is basically designed to be controlled by setting internal registers over the I
2
C bus.
The slave address can be switched to match the system by controlling pin 85 (SLADR).
The following slave addresses are supported.
SLADR = low: E0h
SLADR = high: E2h
Certain registers can also be controlled over the CPU interface.
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