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參數(shù)資料
| 型號： | LC78625E |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 14/35頁 |
| 文件大?。?/td> | 535K |
| 代理商： | LC78625E |
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No. 5502-21/35
LC78625E
11. Subcode Q output circuit; Pin 63: WRQ, pin 64: RWC, pin 65: SQOUT, pin 67: CQCK, pin 75: CS
Subcode Q can be read from the SQOUT pin by applying a clock to the CQCK pin.
Of the eight bits in the subcode, the Q signal is used for song (track) access and display. WRQ will be high only if the
data passed the CRC error check and the subcode Q format internal address is 1 (Note 1). The control microprocessor
can read out data from SQOUT in the order shown below by detecting this high level and applying CQCK. When
CQCK is applied the DSP disables register update internally. The microprocessor should give update permission by
setting RWC high briefly after reading has completed. WRQ will fall to low at this time. Since WRQ falls to low 11.2
ms after going high, CQCK must be applied during the high period. Note that data is read out LSB first.
Note: 1. These conditions will be ignored if an address free command is sent. This is provided to handle CD-ROM applications.
Note: Normally, the WRQ pin indicates the subcode Q standby state. However, it is used for a different monitoring purpose in track check mode and during
internal braking. (See the items on track counting and internal braking for details.)
The LC78625E becomes active when the CS pin is low, and subcode Q data is output from the SQOUT pin. When the CS pin is high, the SQOUT pin
goes to the high-impedance state.
Code
COMMAND
RES = L
$09
ADDRESS FREE
$89
ADDRESS 1
●
CONT
ADR
TNO
INDEX (POINT)*
MIN
SEC
FRAME
ZERO
AMIN (PMIN)* /PKMIN
ASEC (PSEC)* /PKSEC
AFRAME (PFRAME)* /PKFRAME
LVM data/PKM data
*: Items in parentheses refer to the read-in area.
LVM/PKM
16-bit data
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