參數(shù)資料
型號: LC868008A
廠商: Sanyo Electric Co.,Ltd.
英文描述: 8-Bit Single Chip Microcontroller with On-Chip 8K(8192 ×8 bits)-Byte ROM and 640(640 ×8 bits)-Byte RAM(8位單片微控制器(帶片上8K(8192 ×8 bits)字節(jié)ROM和640(640 ×8 bits)字節(jié)RAM))
中文描述: 8位單片機(jī)微控制器的片上8K的(8192 × 8位)字節(jié)ROM和640(640 × 8位)字節(jié)的RAM(8位單片微控制器(帶片上8K的(8192 × 8位)字光盤和640節(jié)(640 × 8位)字節(jié)的RAM))
文件頁數(shù): 25/28頁
文件大?。?/td> 689K
代理商: LC868008A
LC868016/12/08A
25/28
8. AC Characteristics at Ta=-30
°
C to +70
°
C, VSS=0V
Load capacity : 100pF
Load capacity : 80pF
*tCLCL=1/12 tCYC
(Port 0, ADLC,EROE)
(Output terminals except above)
External program memory timing
Ratings
Parameter
Symbol
Pads and Conditions
VDD[V]
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
4.5 - 6.0
2.5 - 6.0
min.
max.
unit
2tCLCL-40
2tCLCL-160
tCLCL-40
tCLCL-160
tCLCL-35
tCLCL-140
tCLCL-25
tCLCL-100
3tCLCL-35
3tCLCL-140
0
0
tCLCL-8
tCLCL-32
ADLC pulse width
tLHLL
Address settling time
tAVLL
For ADLC
Address hold time
tLLAX
For ADLC
ADLC
!
control signal
tLLEL
For
EROE
EROE pulse width
tELEH
3tCLCL-125
3tCLCL-400
Data delay time
tELIV
From
EROE
Data hold time
tEHIX
For
EROE
EROE
!
address in
tEHAV
ns
Refer to figure 13.
SCLK
1 tCYC
tCLCL
ADLC
EROE
Port 0
Port 2
Port 3
tLLEL
tELIV
tELEH
tLHLL
tEHAV
tEHIX
tAVLL
tLLAX
A7-A0
IR
A7-A0
A15-A8
A7-A0
A15-A8
A7-A0
EROE
Port 2
Port 3
Port 0
Port 5
A7-A0
DATA
A15-A8
A7-A0
Bank
Figure 13 Timing of the external Program Memory/Data Memory
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