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參數資料
| 型號： | LC877280B |
| 文件頁數： | 21/24頁 |
| 文件大?。?/td> | 662K |
| 代理商： | LC877280B |
LC8772C8B/B2B/96B/80B
No.6842-21/24
Main system clock oscillation circuit characteristics
The characteristics in the table bellow is based on the following conditions:
1. Use the standard evaluation board SANYO has provided.
2. Use the peripheral parts with indicated value externally.
3. The peripheral parts value is a recommended value of oscillator manufacturer
Table 1. Main system clock oscillation circuit characteristics using ceramic resonator
Circuit parameters
Oscillation
stabilizing time
typ
Frequency
Manufacturer
Oscillator
C1
C2
Rd1
Operating
supply voltage
range
max
Notes
10MHz
4MHz
The oscillation stabilizing time is a period until the oscillation becomes stable after VDD becomes higher than
minimum operating voltage. (Refer to Figure4)
Subsystem clock oscillation circuit characteristics
The characteristics in the table bellow is based on the following conditions:
1. Use the standard evaluation board SANYO has provided.
2. Use the peripheral parts with indicated value externally.
3. The peripheral parts value is a recommended value of oscillator manufacturer
Table 2. Subsystem clock oscillation circuit characteristics using crystal oscillator
Circuit parameters
Oscillation
stabilizing time
typ
Frequency
Manufacturer
Oscillator
C3
C4
Rf
Rd2
Operating
supply voltage
range
max
Notes
32.768kHz
The oscillation stabilizing time is a period until the oscillation becomes stable after executing the instruction which starts the
sub-clock oscillation or after releasing the HOLD mode. (Refer to Figure4)
(Notes) Since the circuit pattern affects the oscillation frequency, place the oscillation-related parts as close to
the oscillation pins as possible with the shortest possible pattern length.
Figure 1 Ceramic oscillation circuit
Figure 2 Crystal oscillation circuit
C3
Rd2
C4
X’tal
XT2
XT1
Rf
C1
C2
CF
CF2
CF1
Rd1
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