LC8772C8B/B2B/96B/80B
No.6842-14/24
3. Electrical Characteristics at Ta=-30
°
C to +70
°
C, VSS1=VSS2=VSS3=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
2.5 to 6.0
min.
max.
1
unit
IIH(1)
Port 0,1,3,7,8
Port A,B,C,D,E,F,L
Output disabled
Pull-up resister OFF.
VIN=VDD
(including OFF state leak
current of the output Tr.)
VIN=VDD
When configured as an input
port
VIN=VDD
VIN=VDD
VIN=V
BIS
+0.5V
(V
BIS
: Bias voltage)
Output disabled
Pull-up resister OFF.
VIN=VSS
(including OFF state leak
current of the output Tr.)
VIN=VSS
When configured as an input
port
VIN=VSS
VIN=VSS
VIN=V
BIS
-0.5V
(V
BIS
: Bias voltage)
IOH=-1.0mA
IOH=-0.1mA
IOH=-0.4mA
IOH=-1.0mA
IOH=-0.1mA
IOL=10mA
IOL=1.6mA
IOL=30mA
IOL=1mA
IOL=0.5mA
IOL=8mA
IOL=1.4mA
I0=0mA
VLCD, 2/3VLCD,
1/3VLCD level output
Refer to figure 8
I0=0mA
VLCD, 2/3VLCD, 1/2VLCD
1/3VLCD level output
Refer to figure 8
Refer to figure 8
IIH(2)
IIH(3)
RES
XT1,XT2
2.5 to 6.0
2.5 to 6.0
1
1
IIH(4)
IIH(5)
CF1
P87/AN7/MICIN
small signal input
Port 0,1,3,7,8
Port A,B,C,D,E,F,L
2.5 to 6.0
2.5 to 6.0
15
15
High level
input
current
4.2
8.5
IIL(1)
2.5 to 6.0
-1
IIL(2)
IIL(3)
RES
XT1,XT2
2.5 to 6.0
2.5 to 6.0
-1
-1
IIL(4)
IIL(5)
CF1
P87/AN7/MICIN
small signal input
Port 0,1,3: CMOS
output option
Port 7
Port A,B,C,D,E,F
2.5 to 6.0
2.5 to 6.0
-15
-15
Low level
input
current
-8.5
-4.2
μ
A
VOH(1)
VOH(2)
VOH(3)
VOH(4)
VOH(5)
VOL(1)
VOL(2)
VOL(3)
VOL(4)
VOL(5)
VOL(6)
VOL(7)
VODLS
4.5 to 6.0 VDD-1
2.5 to 6.0 VDD-0.5
2.5 to 6.0 VDD-1
4.5 to 6.0 VDD-1
2.5 to 6.0 VDD-0.5
4.5 to 6.0
2.5 to 6.0
4.5 to 6.0
4.5 to 6.0
2.5 to 6.0
4.5 to 6.0
2.5 to 6.0
2.5 to 6.0
High level
output
voltage
1.5
0.4
1.5
0.4
0.4
1.5
0.4
±0.2
Port 0,1,3
Port 30,31
Port 7,8
Low level
output
voltage
Port A,B,C,D,E,F
S0–S47
0
LCD output
voltage
regulation
VODLC
COM0–COM3
2.5 to 6.0
0
±0.2
V
RLCD(1) Resistance per one
bias resistor
RLCD(2) Resistance per one
bias resistor
1/2R mode
2.5 to 6.0
60
LCD bias
resistor
Refer to figure 8
2.5 to 6.0
30
k
Continued/