參數(shù)資料
型號: LC87F2932AU-CD-E
廠商: ON Semiconductor
文件頁數(shù): 15/29頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 32K FLASH 64TQLP
標準包裝: 250
芯體尺寸: 8-位
速度: 12MHz
連通性: SIO,UART/USART
外圍設備: PWM,WDT
輸入/輸出數(shù): 59
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 13x8b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: *
包裝: *
LC87F2932A
No.A1210-22/29
Pulse Input Conditions at Ta = -40°C to +85°C, VSS1 = VSS2 = VSS3 = 0V
Parameter
Symbol
Pin/Remarks
Conditions
Specification
VDD[V]
min
typ
max
unit
High/low level
pulse width
tPIH(1)
tPIL(1)
INT0(P70),
INT1(P71),
INT2(P72),
INT3(P73) when
noise filter not used,
INT4(P20 to P23),
INT5(P24 to P27),
INT6(P26),
INT7(P27)
Interrupt source flag can be set.
Event inputs for timer 0 or 1
are enabled.
2.2 to 5.5
1
tCYC
tPIH(2)
tPIL(2)
INT3(P73) when
noise filter time
constant is 1/1
Interrupt source flag can be set.
Event inputs for timer 0 are
enabled.
2.2 to 5.5
2
tPIH(3)
tPIL(3)
INT3(P73) when
noise filter time
constant is 1/32
Interrupt source flag can be set.
Event inputs for timer 0 are
enabled.
2.2 to 5.5
64
tPIH(4)
tPIL(4)
INT3(P73) when
noise filter time
constant is 1/128
Interrupt source flag can be set.
Event inputs for timer 0 are
enabled.
2.2 to 5.5
256
tPIL(5)
RES
Resetting is enabled.
2.2 to 5.5
200
μs
AD Converter Characteristics at Ta = -40°C to +85°C, VSS1 = VSS2 = VSS3 = 0V
Parameter
Symbol
Pin/Remarks
Conditions
Specification
VDD[V]
min
typ
max
unit
Resolution
N
AN0(P80) to
AN6(P86),
AN8(PC0),
AN9(PC1),
AN10(PC2),
AN11(PC3),
AN12(CF1),
AN13(CF2)
3.0 to 5.5
8
bit
Absolute
accuracy
ET
(Note 6-1)
3.0 to 5.5
±1.5
LSB
Conversion
time
tCAD
AD conversion time=32
×tCYC
(when ADCR2=0) (Note 6-2)
4.5 to 5.5
15.68
(tCYC=
0.49s)
97.92
(tCYC=
3.06s)
μs
3.0 to 5.5
21.8
(tCYC=
0.681s)
97.92
(tCYC=
3.06s)
AD conversion time=64
×tCYC
(when ADCR2=1) (Note 6-2)
4.5 to 5.5
18.82
(tCYC=
0.294s)
97.92
(tCYC=
1.53s)
3.0 to 5.5
43.6
(tCYC=
0.681s)
97.92
(tCYC=
1.53s)
Analog input
voltage range
VAIN
3.0 to 5.5
VSS
VDD
V
Analog port
input current
IAINH
VAIN=VDD
3.0 to 5.5
1
μA
IAINL
VAIN=VSS
3.0 to 5.5
-1
Note 6-1: The quantization error (±1/2LSB) is excluded from the absolute accuracy value.
Note 6-2: The conversion time refers to the interval from the time the instruction for starting the converter is issued
to the time the complete digital value corresponding to the analog input value is loaded in the required
register.
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