- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄39192 > LC89052T SPECIALTY CONSUMER CIRCUIT, PDSO24 PDF資料下載
參數(shù)資料
| 型號(hào)： | LC89052T |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| 封裝： | 0.225 INCH, TSSOP-24 |
| 文件頁(yè)數(shù)： | 14/42頁(yè) |
| 文件大?。?/td> | 482K |
| 代理商： | LC89052T |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)
LC89052T
No.7457-21/42
8.5 Error Output Processing (ERROR)
8.5.1 Lock error and data error output
The ERROR pin outputs high level when a PLL lock error happens or an error occurs in the transmitted data.
8.5.2 PLL lock error
The PLL circuit will unlock the input data which does not conform to the bi-phase modulation rules or can not detect
the preamble B, M, or W.
ERROR turns to H when a PLL lock error occurs. When data modulation returns to the normal state, it remains high
for 15m to 50ms, before going to the to low level.
The output of ERROR is synchronized with LRCK.
8.5.3 Input data transmission error
An odd number of input parity errors are detected from the parity bits in the input data.
When input parity errors occur 9 times or more in a row, ERROR turns to high level. After the high level is held for
15m to 50ms following the detection of the PLL lock state, the ERROR returns to low level.
When 8 or fewer input parity errors occur consecutively, an error is output only for intervals between sub-frames
where the errors occurred when non-PCM data is recognized by data delimiter bit 1 in the channel status. In this case,
the parity error flag is not output when PCM data is recognized.
8.5.4 Other errors
Even when ERROR has turned to low, the LC89052T always acquires bits 24 to 27 (sampling frequency) of the
channel status and compares the current data with the data of the previous block. If any differences are found,
ERROR is immediately set to high and processes similar to those for the PLL lock error are carried out.
Similarly, even when the mode that reflects fs calculation results in an error flag is set with FLIMIT, the fs calculation
results are always compared. Here as well, if a disparity occurs in the data, ERROR is immediately turned to high,
and the processing similar to that for the PLL lock error is carried out.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC89060M | PARALLEL, WORD INPUT LOADING, 6-BIT DAC, PDSO20 |
| LC89060 | PARALLEL, WORD INPUT LOADING, 6-BIT DAC, PDIP16 |
| LC89066 | 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP16 |
| LC89066M | 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO20 |
| LC89080 | TRIPLE, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDIP42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC89052TA-E | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類(lèi)型:I2C, SPI 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89052TA-TLM-E | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類(lèi)型:I2C, SPI 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89052THS-E | 制造商:ON Semiconductor 功能描述:AUDIO I/F RECEIVER |
| LC890561W | 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:CMOS IC Digital Audio Interface Receiver with Built-in Data Buffer Memory |
| LC890561W-E | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類(lèi)型:I2C, SPI 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。