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參數(shù)資料
| 型號： | LE25CA322TT |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | PROM |
| 英文描述： | 4K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, MSOP-8 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大小： | 217K |
| 代理商： | LE25CA322TT |
LE25CA322
No.NA1678-5/14
AC Characteristics (at FCLK = 5MHz)/VDD = 2.7V to 5.5V
Parameter
Symbol
Conditions
min
typ
max
Unit
Clock frequency
FCLK
5
MHz
SCK logic high level pulse width
tCLHI
90
ns
SCK logic low level pulse width
tCLLO
90
ns
Input signal rise/fall time
tRF
1us
CS setup time
tCSS
90
ns
SCK setup time
tCLS
90
ns
Data setup time
tDS
20
ns
Data hold time
tDH
30
ns
CS hold time
tCSH
90
ns
SCK hold time
tCLH
90
ns
CS standby pulse width
tCPH
90
ns
CS output high impedance time
tCHZ
150
ns
SCK output data time
tV
80
ns
Output data hold time
tHO
0
ns
WP setup time
tWPS
30
ns
WP hold time
tWPH
30
ns
HOLD setup time
tHS
30
ns
HOLD hold time
tHH
30
ns
HOLD output low impedance time
tHLz
50
ns
HOLD output high impedance time
tHHz
100
ns
Write cycle time
tWC
5ms
SCK output low impedance time
tCLZ
0
ns
Table 1 Command Settings
Command
1st bus
cycle
2nd bus
cycle
3rd bus
cycle
4th bus
cycle
5th bus
cycle
6th bus
cycle
nth bus
cycle
Write enable
(WREN)
06h
Write disable
(WRDI)
Status register read
(RDSR)
05h
Status register write
(WRSR)
01h
DATA
Read
(READ)
03h
A15-A8
A7-A0
Write
(WRITE)
02h
A15-A8
A7-A0
PD *1
Explanatory notes for Table 1
The “h” following each code indicates that the number given is in hexadecimal notation.
Addresses A15 to A12 for all commands are “don’t care.”
*1: “PD” stands for page program data. Any amount of data from 1 to 32 bytes is input.
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