參數(shù)資料
型號： LFEC1E-5TN144C
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 80/163頁
文件大小： 0K
描述： IC FPGA 1.5KLUTS 97I/O 144-TQFP
標(biāo)準(zhǔn)包裝： 60
系列： EC
邏輯元件/單元數(shù)： 1500
RAM 位總計(jì)： 18432
輸入/輸出數(shù)： 97
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
2-20
Architecture
LatticeECP/EC Family Data Sheet
IPexpress
The user can access the sysDSP block via the IPexpress configuration tool, included with the ispLEVER design
tool suite. IPexpress has options to configure each DSP module (or group of modules) or through direct HDL
instantiation. Additionally Lattice has partnered Mathworks to support instantiation in the Simulink tool, which is a
Graphical Simulation Environment. Simulink works with ispLEVER and dramatically shortens the DSP design cycle
in Lattice FPGAs.
Optimized DSP Functions
Lattice provides a library of optimized DSP IP functions. Some of the IPs planned for LatticeECP DSP are: Bit Cor-
relators, Fast Fourier Transform, Finite Impulse Response (FIR) Filter, Reed-Solomon Encoder/ Decoder, Turbo
Encoder/Decoders and Convolutional Encoder/Decoder. Please contact Lattice to obtain the latest list of available
DSP IPs.
Resources Available in the LatticeECP Family
Table 2-9 shows the maximum number of multipliers for each member of the LatticeECP family. Table 2-10 shows
the maximum available EBR RAM Blocks in each of the LatticeECP family. EBR blocks, together with Distributed
RAM can be used to store variables locally for the fast DSP operations.
Table 2-9. Number of DSP Blocks in LatticeECP Family
Table 2-10. Embedded SRAM in LatticeECP Family
DSP Performance of the LatticeECP Family
Table 2-11 lists the maximum performance in millions of MAC operations per second (MMAC) for each member of
the LatticeECP family.
Table 2-11. DSP Block Performance of LatticeECP Family
Device
DSP Block
9x9 Multiplier
18x18 Multiplier
36x36 Multiplier
LFECP6
4
32
16
4
LFECP10
5
40
20
5
LFECP15
6
48
24
6
LFECP20
7
56
28
7
LFECP33
8
64
32
8
Device
EBR SRAM Block
Total EBR SRAM
(Kbits)
LFECP6
10
92
LFECP10
30
276
LFECP15
38
350
LFECP20
46
424
LFECP33
54
498
Device
DSP Block
DSP Performance
MMAC
LFECP6
4
3680
LFECP10
5
4600
LFECP15
6
5520
LFECP20
7
6440
LFECP33
8
7360
相關(guān)PDF資料
PDF描述
HCC65DRTF CONN EDGECARD 130PS DIP .100 SLD
FMC15DRYS CONN EDGECARD 30POS DIP .100 SLD
IR2166 IC PFC/BALLAST CONTROL 16-DIP
LFEC1E-3QN208I IC FPGA 1.5KLUTS 208PQFP
F920G106MAA CAP TANT 10UF 4V 20% 1206
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFEC1E-5TN144I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC20 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC20E-3F256C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC20E-3F256I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC20E-3F484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 19.7 LUT 360 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*