參數(shù)資料
型號(hào): LFXP6C-5FN256C
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 218/397頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 5.8KLUTS 188I/O 256-BGA
標(biāo)準(zhǔn)包裝: 90
系列: XP
邏輯元件/單元數(shù): 6000
RAM 位總計(jì): 73728
輸入/輸出數(shù): 188
電源電壓: 1.71 V ~ 3.465 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-FPBGA(17x17)
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Power Estimation and Management
Lattice Semiconductor
for LatticeECP/EC and LatticeXP Devices
12-18
Another term used for I/Os is the I/O Toggle Rate or the I/O Toggle Frequency. The AF% is applicable to the PFU,
Routing and Memory Read Write Ports, etc. The activity of I/Os is determined by the signals provided by the user
(in the case of inputs) or as an output of the design (in the case of outputs). So, the rates at which I/Os toggle
define their activity. The Toggle Rate (or TR) in MHz of the output is defined as:
Toggle Rate (MHz) = 1/2 * fMAX * AF%
Users are required to provide the TR (MHz) value for the I/O instead of providing the Frequency and AF% in case
of other resources.
The AF can be calculated for each routing resource, output or PFU, however it involves long calculations. The gen-
eral recommendation of a design occupying roughly 30% to 70% of the device is that the AF% used can be
between 15% to 25%. This is an average value that can be seen most of the design. The accurate value of an AF
depends upon clock frequency, stimulus to the design and the final output.
Ambient and Junction Temperature and Airflow
A common method of characterizing a packaged device’s thermal performance is with thermal resistance,
. For a
semiconductor device, thermal resistance indicates the steady state temperature rise of the die junction above a
given reference for each watt of power (heat) dissipated at the die surface. Its units are °C/W.
The most common examples are
JA, thermal resistance junction-to-ambient (in °C/W) and JC, thermal resis-
tance junction-to-case (also in °C/W). Another factor is
JB, thermal resistance junction-to-board (in °C/W).
Knowing the reference (i.e. ambient, case or board) temperature, the power, and the relevant
value, the junction
temperature can be calculated as per following equations.
TJ = TA + JA * P
(1)
TJ = TC + JC * P
(2)
TJ = TB + JB * P
(3)
Where TJ, TA, TC and TB are the junction, ambient, case (or package) and board temperatures (in °C) respectively.
P is the total power dissipation of the device.
JA is commonly used with natural and forced convection air-cooled systems. JC is useful when the package has
a high conductivity case mounted directly to a PCB or heatsink. And
JB applies when the board temperature adja-
cent to the package is known.
The Power Calculator utilizes the 25°C junction temperature as its basis to calculate power, per Equation 1 above.
Users can also provide the airflow values (in LFM) and ambient temperature to get a calculated value of the junc-
tion temperature based on the power estimate.
Managing Power Consumption
One of the most critical design factors today is reducing system power consumption, especially for modern hand-
held devices and electronics. There are several design techniques that designers can use to significantly reduce
overall system power consumption. Some of these include:
1. Reducing operating voltage.
2. Operating within the specified package temperature limitations.
3. Using optimum clock frequency reduces power consumption, as the dynamic power is directly proportional
to the frequency of operation. Designers must determine if a portion of their design can be clocked at a
lower rate that will reduce power.
4. Reducing the span of the design across the device. A more closely placed design utilizes fewer routing
resources for less power consumption.
相關(guān)PDF資料
PDF描述
ASM28DRAH CONN EDGECARD 56POS .156 R/A
LFXP6C-5F256C IC FPGA 5.8KLUTS 188I/O 256-BGA
HSC49DRTN-S93 CONN EDGECARD 98POS DIP .100 SLD
LFXP6C-4FN256I IC FPGA 5.8KLUTS 188I/O 256-BGA
HSC49DRTH-S93 CONN EDGECARD 98POS DIP .100 SLD
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