參數(shù)資料
型號(hào): LH52256C
廠商: Sharp Corporation
英文描述: CMOS 256K (32K x 8) Static RAM
中文描述: 的CMOS 256K(32K的× 8)靜態(tài)RAM
文件頁數(shù): 4/11頁
文件大小: 97K
代理商: LH52256C
DC ELECTRICAL CHARACTERISTICS (T
A
= 0
°
C to +70
°
C, V
CC
= 4.5 V to 5.5 V)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input leakage
current
I
LI
V
IN
= 0 V to V
CC
–1.0
1.0
μ
A
Output leakage
current
I
LO
CE = V
IH
or OE = V
IH
V
I/O
= 0 V to V
CC
–1.0
1.0
μ
A
Operating supply
current
I
CC
Minimum cycle, V
IN
= V
IL
or V
IH
I
I/O
= 0 mA, CE = V
IL
25
45.0
mA
I
CC1
t
RC
, t
WC
= 1
μ
s, V
IN
= V
IL
or V
IH
,
I
I/O
= 0 mA, CE = V
IL
10.0
Standby current
I
SB
CE
V
CC
– 0.2 V
0.6
40.0
μ
A
I
SB1
CE = V
IH
3.0
mA
Output voltage
V
OL
I
OL
= 2.1 mA
0.4
V
V
OH
I
OH
= -1.0 mA
2.4
NOTE:
Typical values at V
CC
= 5.0 V, T
A
= 25
°
C
AC ELECTRICAL CHARACTERISTICS
AC Test Conditions
PARAMETER
MODE
NOTE
Input pulse level
0.6 V to 2.4 V
Input rise and fall time
10 ns
Input and output timing Ref. level
1.5 V
Output load
1 TTL + C
L
(100 pF)
1
NOTE:
1.
Including scope and jig capacitance.
READ CYCLE (T
A
= 0
°
C to +70
°
C, V
CC
= 4.5 V to 5.5 V)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
NOTE
Read cycle time
t
RC
70
ns
Address access time
t
AA
70
ns
CE access time
t
ACE
70
ns
Output enable to output valid
t
OE
35
ns
Output hold from address change
t
OH
10
ns
CE Low to output active
t
LZ
10
ns
1
OE Low to output active
t
OLZ
5
ns
1
CE High to output in High impedance
t
HZ
0
30
ns
1
OE High to output in High impedance
t
OHZ
0
30
ns
1
NOTES:
1.
Active output to high-impedance and high-impedance to output active tests specified for a
±
200 mV
transition from steady state levels into the test load.
LH52256C/CH
CMOS 256K (32K
×
8) Static RAM
4
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