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參數(shù)資料
| 型號(hào)： | LM2501SL |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Mobile Pixel Link (MPL) Camera Interface Serializer and Deserializer |
| 中文描述： | LINE TRANSCEIVER, QCC24 |
| 封裝： | 3.50 X 4.50 MM, 0.60 MM HEIGHT, CSP-24 |
| 文件頁(yè)數(shù)： | 12/14頁(yè) |
| 文件大?。?/td> | 302K |
| 代理商： | LM2501SL |
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Features and Operation
POWER DOWN/OFF
The device may be powered by its PD* pin.ALow on this pin
will power down the entire device.
TABLE 2. Power Down Output States
Mode
Pin
Type
Output State
in Power Down
LOW
OFF
OFF
LOW
LOW
LOW
OFF
SER
SER
SER
DES
DES
DES
DES
WCLKIO
MC
MD
D[0:7]
V, H
PCLK
WC
LVCMOS
MPL
MPL
LVCMOS
LVCMOS
LVCMOS
MPL
UN-USED/OPEN INPUTS
Un-used control/inputs pins must be driven to their appropri-
ate logic states to set up the desired operating modes.
UN-USED OUTPUTS
Unused outputs should be left open to minimize power dis-
sipation.
POWERING UP
The LM2501 should be powered up with all power supplies
at the same time, alternately VDDIO may lag VDD and
VDDA. Do not power up with VDDIO before VDD and VDDA.
PHASE-LOCKED LOOP
When the device is configured as a Serializer, a PLL is
provided to generate the serial link clock. The Phase-locked
loop system generates the serial data clock at five times the
input clock. The PLL operates with an input clock between
4 MHz and 16 MHz. The Deserializer does not utilize the PLL
and its PLL is powered down.
RESET
PD* should be held Low until the power supply has powered
up and is stable. The PD* should then be de-asserted to
generate a RESET and start up. Stopping the WCLKIO or
the PCLK will not RESET the part. A power cycle or PD*
cycle is requested to generate a RESET event.
SERIALIZER/DESERIALIZER SELECTION
The Mode[1:0] pins are used to configure the device as
either a Serializer or Deserializer and other configuration
options.
WHISPERCLOCK
An additional clock signal is sent from the Deserializer to the
Serializer. This can be used to pass a clock reference
(4 MHz to 28 MHz) up to the Camera device from the host.
This link is independent of the Serial data path (opposite
direction). See also
Figure 5
. The SER can only start up, if
the WCLKIO(ser-out) has been active.
20091608
FIGURE 10. Sleep to Active
L
www.national.com
12
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| LM2502SM | Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM2502 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer |
| LM2502SM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer |
| LM2502SM/NOPB | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| LM2502SMX/NOPB | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| LM2502SQ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer |
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