參數(shù)資料
型號: LM2633MTD
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Advanced Two-Phase Synchronous Triple Regulator Controller for Notebook CPUs
中文描述: SWITCHING CONTROLLER, 275 kHz SWITCHING FREQ-MAX, PDSO48
封裝: TSSOP-48
文件頁數(shù): 36/40頁
文件大小: 1350K
代理商: LM2633MTD
Control Loop Design
(Continued)
amplifier, and I
is the current drawn by the FB2 pin. The
V
and I
fb2
have a typical value of 1.24V and 18 nA
respectively.
Example: V
out2
= 1.5V, R
1
= 10 k
.
(51)
To calculate the total system tolerance, use the following
equation:
(52)
where
φ
is the tolerance of the Channel 2 reference voltage,
and
σ
is the tolerance of the resistors.
Example: V
out2
= 3.3V, feedback resistors have a
±
1%
tolerance.
(53)
That means the 3.3V output voltage will have a
±
2.96%
tolerance over the (LM2633 die) temperature range of 0C to
125C.
Channel 2 output voltage should not go above 6V in
pulse-skip mode. That is because the SENSE2 pin cannot
take a voltage higher than 6V. However, if force-PWM op-
eration is the chosen operating mode, then the SENSE2 pin
can be grounded and there will be no limitation to Channel 2
output voltage.
If the desired Channel 1 voltage is higher than 2V, an
op-amp and a voltage divider can be used to expand the
voltage range, as shown in Figure 18
It is recommended that the VIDx pins be all tied to ground so
that the DAC is set at 2.00V. That will reduce the total
tolerance. The equations used to calculate Channel 2’s feed-
back resistors and total tolerance still hold, except that the
reference voltage V
is 2.00V instead of 1.24V. Channel 1
can operate only in force-PWM mode when it is configured
as Figure 18
Since an op-amp is an active device, pay close attention to
its start up and shut down behavior. Make sure that it does
not create a problem during those times.
Designing a Power Supply without a Load Transient
Specification
Many times the load transient response of a buck regulator is
not a critical issue. In that case, the selection of the power
stage components can start from the inductor ripple current.
Choosing the peak-to-peak ripple current to be 30% of the
maximum load current is often a good starting point. Then
the inductance value can be determined by ripple, switching
frequency and input and output voltages. By rearranging
Equation (13) the inductance value can be calculated as
follows:
(54)
Example: V
in_max
= 21V, V
n
= 1.6V, I
load_max
= 10A.
The output capacitors can be chosen based on the output
voltage ripple requirement. If there is no specific require-
ment, then a
±
1% ripple level may be a good starting point.
The equation for determining the impedance of the output
capacitors is:
(55)
If the ESR zero frequency of the capacitor is lower than the
switching frequency, such as the case of aluminum, tantalum
and OSCON capacitors, then the output capacitors are cho-
sen by the ESR value. Otherwise, such as in the case of
ceramic capacitors, the output capacitors are chosen by the
capacitance. The equation is:
(56)
Basically make sure that the product of the impedance of the
capacitors and the ripple current does not exceed the ripple
voltage requirement.
Example: V
n
= 1.6V, I
rip
= 3A.
(57)
If ceramic capacitors are preferred, then the minimum ca-
pacitance is:
(58)
200008B6
FIGURE 18. How to Make V
OUT1
Higher Than 2V
L
www.national.com
36
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