Application Information
(Continued)
Refer to the section
Surface Mount Technology (SMD) As-
sembly Considerations
. For best results in assembly, align-
ment ordinals on the PC board should be used to facilitate
placement of the device. The pad style used with Micro SMD
package must be the NSMD (non-solder mask defined) type.
This means that the solder-mask opening is larger than the
pad size. This prevents a lip that otherwise forms if the
solder-mask and pad overlap, from holding the device off the
surface of the board and interfering with mounting. See
Application Note 1112 for specific instructions how to do this.
The 10-Bump package used for the LM3200 has 300 micron
solder balls and requires 10.82 mil pads for mounting on the
circuit board. The trace to each pad should enter the pad
with a 90 entry angle to prevent debris from being caught in
deep corners. Initially, the trace to each pad should be 6-7
mil wide, for a section approximately 6 mil long or longer, as
a thermal relief. Then each trace should neck up or down to
its optimal width. The important criterion is symmetry. This
ensures the solder bumps on the LM3200 re-flow evenly and
that the device solders level to the board. In particular,
special attention must be paid to the pads for bumps B3, C3
and D3. Because PGND and PV
are typically connected to
large copper planes, inadequate thermal relief can result in
inadequate re-flow of these bumps.
The Micro SMD package is optimized for the smallest pos-
sible size in applications with red or infrared opaque cases.
Because the Micro SMD package lacks the plastic encapsu-
lation characteristic of larger devices, it is vulnerable to light.
Backside metalization and/or epoxy coating, along with front-
side shading by the printed circuit board, reduce this sensi-
tivity. However, the package has exposed die edges. In
particular, Micro SMD devices are sensitive to light, in the
red and infrared range, shining on the package’s exposed
die edges.
Do not use or power-up the LM3200 while subjecting it to
high intensity red or infrared light; otherwise degraded, un-
predictable or erratic operation may result. Examples of light
sources with high red or infrared content include the sun and
halogen lamps. Place the device in a case opaque to red or
infrared light.
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter
design. Poor board layout can disrupt the performance of a
DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces.
These can send erroneous signals to the DC-DC converter,
resulting in poor regulation or instability. Poor layout can also
result in re-flow problems leading to poor solder joints be-
tween the Micro SMD package and board pads. Poor solder
joints can result in erratic or degraded performance. Good
layout for the LM3200 can by implemented by following a
few simple design rules.
1.
Place the LM3200 on 10.82 mil pads.As a thermal relief,
connect to each pad with a 7 mil wide, approximately 7
mil long traces, and when incrementally increase each
trace to its optimal width. The important criterion is sym-
metry to ensure the solder bumps on the LM3200 re-flow
evenly (see
Micro SMD Package Assembly and Use
).
Place the LM3200, inductor and filter capacitors close
together and make the trace short. The traces between
these components carry relatively high switching cur-
rents and act as antennas. Following this rule reduces
radiated noise. Place the capacitors and inductor close
to the LM3200. The input capacitor should be placed
right next to the device between PV
IN
and PGND pin.
Arrange the components so that the switching current
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor,
through the LM3200 and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground, through the LM3200 by the inductor, to
the output filter capacitor and then back through ground,
forming a second current loop. Routing these loops so
the current curls in the same direction, prevents mag-
duces radiated noise.
Connect the ground pins of the LM3200, and filter ca-
pacitors together using generous component side cop-
per fill as a pseudo-ground plane. Then connect this to
the ground-plane (if one is used) with several vias. This
reduces ground plane noise by preventing the switching
currents from circulating through the ground plane. It
also reduces ground bounce at the LM3200 by giving it
a low impedance ground connection.
Use wide traces between the power components and for
power connections to the DC-DC converter circuit. This
reduces voltage errors caused by resistive losses across
the traces.
Route noise sensitive traces, such as the voltage feed-
back trace, away from noisy traces and components.
The voltage feedback trace must remain close to the
LM3200 circuit and should be routed directly from FB pin
to V
at the output capacitor. A good approach is to
route the feedback trace on another layer and to have a
ground plane between the top layer and the layer on
which the feedback trace is routed. This reduces EMI
radiation on to the DC-DC converter’s own voltage feed-
back trace.
It is recommended to connect BYPOUT pin to V
at
the output capacitor using a separate trace, instead of
connecting it directly to the FB pin for better noise
immunity.
2.
3.
4.
5.
6.
7.
L
www.national.com
14