參數(shù)資料
型號: LM3200TL
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Miniature, Adjustable, Step-Down DC-DC Converter with Bypass Mode for RF Power Amplifiers
中文描述: 1.2 A SWITCHING REGULATOR, 2200 kHz SWITCHING FREQ-MAX, PBGA10
封裝: ROHS COMPLIANT, THIN MICRO SMD, 10 PIN
文件頁數(shù): 11/15頁
文件大小: 885K
代理商: LM3200TL
Operation Description
(Continued)
sophisticated portable device with complex power manage-
ment needs. Fixed-frequency PWM operation offers regu-
lated output at high efficiency while minimizing interference
with sensitive IF and data acquisition circuits. Bypass mode
(Forced or Automatic) turns on an internal FET bypass
switch to power the PA directly from the battery. Shutdown
mode turns the device off and reduces battery consumption
to 0.1 μA (typ).
DC PWM mode output voltage precision is +/-2% for
3.6V
. Efficiency is typically around 96% for a 120 mA
load with 3.2V output, 3.6V input. PWM mode quiescent
current is 0.7 mA typ. The output voltage is dynamically
programmable from 0.8V to 3.6V by adjusting the voltage on
the control pin without the need for external feedback resis-
tors. This ensures longer battery life by being able to change
the PA supply voltage dynamically depending on its trans-
mitting power.
Additional features include current overload protection, over
voltage protection and thermal shutdown.
The LM3200 is constructed using a chip-scale 10-pin micro
SMD package. This package offers the smallest possible
size, for space-critical applications such as cell phones,
where board area is an important design consideration. Use
of a high switching frequency (2 MHz) reduces the size of
external components. As shown in
Figure 1
, only few exter-
nal components are required for implementation. Use of a
micro SMD package requires special design considerations
for implementation. (See Micro SMD PackageAssembly and
use in the Applications Information section.) Its fine bump-
pitch requires careful board design and precision assembly
equipment. Use of this package is best suited for opaque-
case applications, where its edges are not subject to high-
intensity ambient red or infrared light. Also, the system con-
troller should set EN low during power-up and other low
supply voltage conditions. (See Shutdown Mode in the De-
vice Information section.)
Circuit Operation
Referring to
Figure 1
, the LM3200 operates as follows. Dur-
ing the first part of each switching cycle, the control block in
the LM3200 turns on the internal PFET (P-channel MOS-
FET) switch. This allows current to flow from the input
through the inductor to the output filter capacitor and load.
The inductor limits the current to a ramp with a slope of
around (V
-V
)/L, by storing energy in a magnetic field.
During the second part of each cycle, the controller turns the
PFET switch off, blocking current flow from the input, and
then turns the NFET (N-channel MOSFET) synchronous
rectifier on. In response, the inductor’s magnetic field col-
lapses, generating a voltage that forces current from ground
through the synchronous rectifier to the output filter capacitor
and load. As the stored energy is transferred back into the
circuit and depleted, the inductor current ramps down with a
slope around V
OUT
/L. The output filter capacitor stores
charge when the inductor current is going high, and releases
it when inductor current is going low, smoothing the voltage
across the load.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated
rectangular wave formed by the switch and synchronous
rectifier at SW to a low-pass filter formed by the inductor and
output filter capacitor. The output voltage is equal to the
average voltage at the SW pin.
PWM Mode
While in PWM (Pulse Width Modulation) mode, the output
voltage is regulated by switching at a constant frequency
and then modulating the energy per cycle to control power to
the load. Energy per cycle is set by modulating the PFET
switch on-time pulse width to control the peak inductor cur-
rent. This is done by comparing the signal from the PFET
drain current to a slope-compensated reference current gen-
erated by the error amplifier. At the beginning of each cycle,
the clock turns on the PFET switch, causing the inductor
current to ramp up. When the current sense signal ramps
past the error amplifier signal, the PWM comparator turns off
the PFET switch and turns on the NFET synchronous recti-
fier, ending the first part of the cycle. If an increase in load
pulls the output down, the error amplifier output increases,
which allows the inductor current to ramp higher before the
comparator turns off the PFET. This increases the average
current sent to the output and adjusts for the increase in the
load. Before appearing at the PWM comparator, a slope
20126136
FIGURE 1. Typical Operating System Circuit
L
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11
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