參數(shù)資料
型號: LM322N
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬波形發(fā)生器
英文描述: Precision Timers
中文描述: RECTANGULAR, TIMER, PDIP14
封裝: 0.300 INCH, PLASTIC, DIP-14
文件頁數(shù): 7/14頁
文件大?。?/td> 281K
代理商: LM322N
Pin Function Description
(Continued)
for instance, cannot be held for more than 4 seconds.
These levels are based on 40
§
C maximum initial chip tem-
perature. When driving inductive loads, always use a clamp
diode to protect the transistor from inductive kick-back.
A
boost
pin is provided on the LM122 to increase the speed
of the internal comparator. The comparator is normally op-
erated at low current levels for lowest possible input current.
For timing periods less than 1 ms, where low input current is
not needed, comparator operating current can be increased
several orders of magnitude. Shorting the boost terminal to
V
a
increases the emitter current of the vertical PNP drivers
in the differential stage from 25 nA to 5
m
A. This pin is not
available on the LM3905.
With the timer in the unboosted state, timing periods are
accurate down to about 1 ms. In the boosted mode, loss of
accuracy due to comparator speed is only about 800 ns, so
timing periods of several microseconds can be used. The
800 ns error is relatively insensitive to temperature, so tem-
perature coefficient of pulse width is still good.
The
Logic
pin is used to reverse the signal appearing at the
output transistor. An open or ‘‘high’’ condition on the
logic
pin programs the output transistor to be ‘‘off’’ during the
timing period and ‘‘on’’ all other times. Grounding the
logic
pin reverses the sequence to make the transistor ‘‘on’’ dur-
ing the timing period. Threshold for the
logic
pin is typically
100 mV with 150
m
A flowing out of the terminal. If an active
drive to the
logic
pin is desired, a saturated transistor drive
is recommended, either with a discrete transistor or the
open collector output of integrated logic. A maximum V
SAT
of 25 mV at 200
m
A is required. Minimum and maximum
voltages that may appear on the
logic
pin are 0 and
a
5.0,
respectively.
Typical Applications
Basic Timers
Figure 1 is a basic timer using the collector output. R
t
and C
t
set the time interval with R
L
as the load. During the timing
interval the output may be either high or low depending on
the connection of the logic pin. Timing waveforms are
shown in the sketch along side Figure 1. Note that the trig-
ger pulse may be either shorter or longer than the output
pulse width.
Figure 2 is again a basic timer, but with the output taken
from the emitter of the output transistor. As with the collec-
tor output, either a high or low condition may be obtained
during the timing period.
Simulating a Thermal Delay Relay
Figure 3 is an application where the LM122 is used to simu-
late a thermal delay relay which prevents power from being
applied to other circuitry until the supply has been on for
some time. The relay remains de-energized for R
t
C
t
sec-
onds after V
CC
is applied, then closes and stays energized
until V
CC
is turned off.Figure 4 is a similar circuit except that
the relay is energized as soon as V
CC
is applied. R
t
C
t
sec-
onds later, the relay is de-energized and stays off until the
V
CC
supply is recycled.
TL/H/7768–11
FIGURE 1. Basic Timer-Collector
Output and Timing Chart
TL/H/7768–12
FIGURE 2. Basic Timer-Emitter Output and Timing Chart
TL/H/7768–13
FIGURE 3. Time Out on Power Up
(Relay Energized R
t
C
t
Seconds after V
CC
is Applied)
a
5V Supply Driving 28V Relay
Figure 5 shows the timer interfacing 5V logic to a high volt-
age relay. Although the V
a
terminal could be tied to the
a
28V supply, this may be an unnecessary waste of power
in the IC or require extra wiring if the LM122 is on a logic
card. In either case, the threshold for the trigger is 1.6V.
7
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