參數(shù)資料
型號(hào)： LM3311
廠商： National Semiconductor Corporation
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： Step-Up PWM DC/DC Converter with Integrated LDO, Op-Amp, and Gate Pulse Modulation Switch
中文描述： 升壓的PWM直流/直流集成穩(wěn)壓器，運(yùn)算放大器和開(kāi)關(guān)門(mén)脈沖調(diào)制器
文件頁(yè)數(shù)： 23/29頁(yè)
文件大?。?/td> 2052K
代理商： LM3311
Operation
(Continued)
SELECTING THE COMPENSATION COMPONENTS
The first step in selecting the compensation components R
C
and C
C
is to set a dominant low frequency pole in the control
loop. Simply choose values for R
C
and C
C
within the ranges
given in the
Introduction to Compensation
section to set this
pole in the area of 10Hz to 500Hz. The frequency of the pole
created is determined by the equation:
where R
is the output impedance of the error amplifier,
approximately 900k
. Since R
is generally much less than
R
O
, it does not have much effect on the above equation and
can be neglected until a value is chosen to set the zero f
ZC
.
f
ZC
is created to cancel out the pole created by the output
capacitor, f
P1
. The output capacitor pole will shift with differ-
ent load currents as shown by the equation, so setting the
zero is not exact. Determine the range of f
P1
over the ex-
pected loads and then set the zero f
ZC
to a point approxi-
mately in the middle. The frequency of this zero is deter-
mined by:
Now R
can be chosen with the selected value for C
C
.
Check to make sure that the pole f
is still in the 10Hz to
500Hz range, change each value slightly if needed to ensure
both component values are in the recommended range.
HIGH OUTPUT CAPACITOR ESR COMPENSATION
When using an output capacitor with a high ESR value, or
just to improve the overall phase margin of the control loop,
another pole may be introduced to cancel the zero created
by the ESR. This is accomplished by adding another capaci-
tor, C
C2
, directly from the compensation pin V
C
to ground, in
parallel with the series combination of R
C
and C
C
. The pole
should be placed at the same frequency as f
Z1
, the ESR
zero. The equation for this pole follows:
To ensure this equation is valid, and that C
C2
can be used
without negatively impacting the effects of R
C
and C
C
, f
PC2
must be greater than 10f
ZC
.
CHECKING THE DESIGN
With all the poles and zeros calculated the crossover fre-
quency can be checked as described in the section
DC Gain
and Open-loop Gain
. The compensation values can be
changed a little more to optimize performance if desired.
This is best done in the lab on a bench, checking the load
step response with different values until the ringing and
overshoot on the output voltage at the edge of the load steps
is minimal. This should produce a stable, high performance
circuit. For improved transient response, higher values of R
C
should be chosen. This will improve the overall bandwidth
which makes the regulator respond more quickly to tran-
sients. If more detail is required, or the most optimum per-
formance is desired, refer to a more in depth discussion of
compensating current mode DC/DC switching regulators.
POWER DISSIPATION
The output power of the LM3311 is limited by its maximum
power dissipation. The maximum power dissipation is deter-
mined by the formula
P
D
= (T
jmax
- T
A
)/
θ
JA
where T
is the maximum specified junction temperature
(125C), T
is the ambient temperature, and
θ
JA
is the ther-
mal resistance of the package.
LAYOUT CONSIDERATIONS
The input bypass capacitor C
, as shown in the typical
operating circuit, must be placed close to the IC. This will
reduce copper trace resistance which effects input voltage
ripple of the IC. For additional input voltage filtering, a 100nF
bypass capacitor can be placed in parallel with C
, close to
the V
pin, to shunt any high frequency noise to ground. The
output capacitor, C
, should also be placed close to the
IC. Any copper trace connections for the C
capacitor can
increase the series resistance, which directly effects output
voltage ripple. The feedback network, resistors R
FB1
and
R
FB2
, should be kept close to the FB pin, and away from the
inductor, to minimize copper trace connections that can in-
ject noise into the system. R
E
and C
E
should also be close to
the RE and CE pins to minimize noise in the GPM circuitry.
Trace connections made to the inductor and schottky diode
should be minimized to reduce power dissipation and in-
crease overall efficiency. For more detail on switching power
supply layout considerations see Application Note AN-1149:
Layout Guidelines for Switching Power Supplies
.
The input capacitor, output capacitor, and feedback resistors
for the LDO should be placed as close to the device as
possible to minimize noise and increase stability. Keep the
feedback traces short and connect R
ADJ2
directly to AGND
close to the device.
For Op-Amp layout please refer to the
Operational Amplifier
section.
Figure 6
,
Figure 7
, and
Figure 8
in the Application Informa-
tion section following show the schematic and an example of
a good layout as used in the LM3310/11 evaluation board.
L
www.national.com
23
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LM3311_07 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Step-Up PWM DC/DC Converter with Integrated LDO, Op-Amp, and Gate Pulse Modulation Switch
LM3311SQ 制造商:Texas Instruments 功能描述:CONVERTER DC/DC STEP UP LLP-24
LM3311SQ/NOPB 功能描述:IC REG BOOST ADJ 2A DL 24LLP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開(kāi)關(guān)穩(wěn)壓器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:降壓（降壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:3.3V 輸入電壓:4.5 V ~ 24 V PWM 型:- 頻率 - 開(kāi)關(guān):- 電流 - 輸出:125mA 同步整流器:無(wú) 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 包裝:Digi-Reel® 供應(yīng)商設(shè)備封裝:SOT-6 其它名稱:MAX1836EUT33#TG16DKR
LM3311SQ-HIOP 功能描述:DC/DC 開(kāi)關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
LM3311SQ-HIOP/NOPB 功能描述:DC/DC 開(kāi)關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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