Fail Safe Features
(Continued)
In the event of an extremely high charge current, the cell
voltage could exceed the maximum supply rating of the
IC. The IC is protected by internal voltage clamps and the
external 100
resistors R3 and R4.
The external MOSFET pair turn-off resistor R2 aids in fail
safe operation in the rare event that the IC fails. Dual in-
dependently controlled series switches internal to the IC
must both turn on to allow the MOSFET pair to conduct.
If either control signal is in error, the external resistor R2
will ensure that the MOSFET pair turn OFF.
The LM3641 is 100% tested for all aspects of operation.
The digital design-for-test methodology allows the cir-
cuitry to be tested at a greatly accelerated rate while
maintaining near perfect fault coverage.
The cell bypass resistor prevents leakage current from
continuing to charge overcharged cells.
PCB Safety Considerations
The power MOSFET turn-OFF resistor R2 is critical for
proper turn-OFF of the MOSFETs during a fault condition.
Precaution is necessary so that this resistor or its con-
tacts to the FET terminals is not interrupted by defects
during and after the PCB assembly. The most robust de-
sign is to replicate this resistor and its connections (see
Figure 6).
The IC bypass capacitor, C1, maintains stable operation
of the IC’s analog functions. This component’s presence
can be assured with a redundant capacitor (see Figure
6).
Pin Description
R
sense
V
SS
Terminal of the internal current sensing resistor.
Negative IC supply and sense pin for the cell’s
negative terminal.
Enable/Disable for MOSFET drive and power-
down mode. Also used to recover from fault condi-
tions.
Sense pin for the cell’s positive terminal.
Positive IC supply.
High impedance pull-up signal indicating that the
overcharge transition has occurred.
Pin used to monitor the negative terminal potential
of the battery pack.
Gate drive for the external MOSFET pair. This pin
is switched to V
in the ON condition and is high
impedance for the OFF condition.
Enable
V+
V
DD
Full
V
GATE
Glossary of Terms
Conduction
Battery pack mode of operation when the
MOSFET pair is ON.
Disconnect
Battery pack mode of operation where
the MOSFET pair is OFF.
State of current conduction into positive
terminal of battery pack from a current
limited voltage source that does not ex-
ceed the maximum voltage rating of the
MOSFET pair.
State of current conduction out of the
positive terminal of battery pack into a
load.
The state when the Enable pin potential
is set to the V+ potential. The IC operates
with full functionality.
The IC state when the Enable pin is float-
ing or pulled low, such as in a detached
pack. The Enable pin will be pulled to V
with
an
internal
I
. The IC will go into power-
down and the MOSFET pair is turned
OFF to protect the pack from accidental
short circuits, invalid chargers or invalid
loads.
The ability to safely return to conduction
mode after a fault condition has caused
the MOSFET pair to turn OFF. Recovery
is accomplished with a low to high signal
on the Enable pin for overcharge, over-
discharge and overcurrent.
Recovery from overdischarge is auto-
matic with the application of a charger.
Recovery from overcharge is automatic
with the application of a load. Recovery
from overcurrent is automatic when the
impedance at the terminal pack exceeds
4–7 M
.
The turn-off time of the MOSFET pair.
This parameter is dependent on the ex-
ternal components used, however the
typical time is 1–4 ms.
A reduced power state resulting from a
floating Enable. The MOSFET pair is al-
ways OFF.
A resistor that is connected across the
cell(s) whenever overcharge conditions
are detected. If the MOSFET pair is OFF
and a charger applied, then some of the
current in the V pin would flow through
the cell. This resistor ensures that the cell
is discharged and not charged during
such an event. This resistor also com-
pensates for the possibility of leaking
OFF MOSFET pair overcharging the
cell(s).
A resistor that is connected across the
MOSFETs after overcurrent fault. When
the pack impedance 3–7 M
, the MOS-
FET bypass resistor reduces the MOS-
FET voltage to less than V
and
the MOSFET turns ON. If the MOSFET
bypass resistor is active, and the Enable
goes low, the bypass resistor turns OFF.
Return to conduction mode for overdis-
charged packs does not require a low to
high edge on the Enable pin. The appli-
cation of a charger will turn on the FETs.
Charging
Discharging
IC Enabled
IC Disabled
current
source,
Recovery
t
FET-TURN-OFF
Power-down
Cell-Bypass
resistor
MOSFET Bypass
resistor
LCCE
DS012931-16
FIGURE 5. Connection Diagram
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