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參數(shù)資料
| 型號(hào)： | LM9800 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit Greyscale/24-Bit Color Linear CCD Sensor Processor |
| 中文描述： | 8位Greyscale/24-Bit彩色線陣CCD傳感器處理器 |
| 文件頁(yè)數(shù)： | 21/34頁(yè) |
| 文件大小： | 619K |
| 代理商： | LM9800 |
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Configuration Register
t
MCLK
= 1/f
MCLK
= 1 MCLK period. Examples given in parenthesis are for f
MCLK
=
20MHz (t
MCLK
= 50ns). (Continued)
TABLE 2. Configuration Register Parameters
(Continued)
Parameter
Dummy Pixels
Note:
Minimum
Value is 1. Actual
number of dummy
pixels in CCD should
be one less than
number in this
register.
Control Bits
BLS4
0
0
0
1
1
BLL4
0
0
0
1
1
GAIN3
0
0
1
1
Result
BLS7
0
0
0
1
1
BLL7
0
0
0
1
1
GAIN6
0
0
1
1
BLS6
0
0
0
1
1
BLL6
0
0
0
1
1
GAIN5
0
0
1
1
BLS5
0
0
0
1
1
BLL5
0
0
0
1
1
GAIN4
0
0
1
1
BLS3
0
0
0
1
1
BLL3
0
0
0
1
1
GAIN2
0
0
1
1
BLS2
0
0
0
1
1
BLL2
0
0
0
1
1
GAIN1
0
0
1
1
BLS1
0
0
1
1
1
BLL1
0
0
1
1
1
GAIN0
0
1
0
1
BLS0
0
1
0
0
1
BLL0
0
1
0
0
1
Not Valid
0
1
253
254
Optical Black Pixels
Note:
Minimum
Value is 1
Not Valid
1
2
254
255
Internal PGA Gain
Coefficient
0 [0 dB]
1
126
127 [6 dB]
PGA Gain
Coefficient
Source
Power Down
PGASRC
0
1
PD
0
1
OFF ADD
0
1
VGA
0
1
VGA
c
0
1
VGA
b
0
1
Internal
External
Operating
Power Down
Offset Add
Offset
z
0 LSB
Offset
z
+1 LSB
Master VGA Control
VGA Disabled
VGA Enabled
VGA State for
Pixel “c”
VGA bypassed
VGA on
VGA State for
Pixel “b”
VGA bypassed
VGA on
21
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| LM9800CCV | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Greyscale/24-Bit Color Linear CCD Sensor Processor |
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| LM9801CCVF | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Greyscale/24-Bit Color Linear CCD Sensor Processor |
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