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Applications Information
(Continued)
To use the Offset DAC and Offset Add bit for offset correc-
tion, the offset errors (V
and V
) must first be deter-
mined, as shown in Figure 25 This is done be measuring the
voltage at the PGAoutput, using theADC with a black image
on the CCD (a black image can usually be created simply by
turning off the scanner’s illumination). If this voltage is known
with a PGA gain of 1.00V/V (0 dB) and 2.95V/V (9 dB), then
the offset errors (V
and V
OS2
) can be determined from
the following two equations:
V
ADC1
=
1(V
OS1
+ V
DAC1
) + V
OS2
+ V
DAC2
(PGA gain = 1)
V
ADC2
=
2.95(V
OS1
+ V
DAC1
) + V
OS2
+ V
DAC2
(PGA gain = 2.95)
Solving for V
OS1
and V
OS2
:
V
OS1
= (V
ADC2
–V
ADC1
)/1.95–V
DAC1
V
OS2
= (2.95V
ADC1
–V
ADC2
)/1.95–V
DAC2
These equations were used to produce this procedure for
cancelling the LM9811’s offset errors. Please note that all
voltages and measurements are in units of ADC LSBs to
simplify calibration.
1.
Set the VGA Gain to 1V/V (VGA code = 0).
2.
Set the Offset DAC (V
) to its maximum value (+25.2
LSBs) to ensure the total offset is positive and therefore
measurable by the ADC.
3.
Set the Offset Add bit (V
DAC2
) to 0.
4.
Set the PGA Gain to 1V/V (PGA code = 0).
5.
Digitize a black line.
6.
Calculate the average (in ADC LSBs) of all the valid pix-
els in the black line and store that number as V
ADC1
.
7.
Set the PGA Gain to 2.95V/V (PGA code = 255).
8.
Digitize a black line.
9.
Calculate the average (in ADC LSBs) of all the valid pix-
els in the black line and store that number as V
ADC2
.
10. Calculate V
OS1
:
V
OS1
= (V
ADC2
)–V
ADC1
)/1.95–25.2
11. Program the Offset DAC register using the formula:
Offset DAC code = -(V
OS1
)(15/25.2)
= (25.2 + (V
ADC1
–V
ADC2
)/1.95)(15/25.2)
= 15 + 0.3(V
ADC1
–V
ADC2
)
(
Note:
This calculation can be approximated as
15 + 10(V
ADC1
–V
ADC2
)/32
for ease of programming in 8-bit microcontrollers)
12. If 3V
ADC1
>
V
ADC2
, then set the Offset Add bit to 0.
If 3V
ADC1
<
V
ADC2
, set the Offset Add bit to 1.
13. The final value of the offset present at theADC input can
be used for the shading calibration calculations. Calcu-
late the final value of the ADC input offset (V
OFFSET
) us-
ing:
A. (3V
ADC1
–V
ADC2
)/2
(if the Offset Add bit is 0), or
B. (3V
ADC1
–V
ADC2
)/2 + 8
(if the Offset Add bit is 1)
5.2 Coarse Gain Calibration
The LM9811’s PGA corrects for up to 9 dB of variation in the
CCD output signal’s white level intensity. That 9 dB range
has to be centered inside the 9 dB window of correction as
shown in Figure 26 The window’s upper limit is determined
by the Target code, and the lower limit by the Target code di-
vided by 2.8 (this corresponds to the minimum gain range of
the PGA). To allow proper calibration, the amplitude of all the
pixels in the CCD should be inside this range when those
pixels are scanning an image corresponding to the Target
code. The placement of the pixels inside the 9 dB window
can be controlled by any of three ways: changing the gain of
the VGA, changing the integration time of the CCD, or
changing the intensity of the light source.
In most designs, the output waveform of the CCD can be
brought into the 9 dB correction range of the PGA by adjust-
ing the gain of the VGA. This is the next step in system
calibration.
Figure 27is a flowchart of one technique to find the optimum
VGAgain setting during calibration. Calibration begins with a
VGA gain setting of 1V/V and increments the VGA gain until
one of the four possible results occur. Result 1 is the desired
outcome, where the signal falls into the range shown in Fig-
ure 26 and the VGA calibration has been successful.
DS012813-33
FIGURE 25. Offset Calibration
DS012813-34
FIGURE 26. CCD Input Signal In Range
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