參數(shù)資料
型號: LM9812
廠商: National Semiconductor Corporation
英文描述: LM9812 30-Bit Color Linear CCD Sensor Processor
中文描述: LM9812 30位彩色線陣CCD傳感器處理器
文件頁數(shù): 20/37頁
文件大?。?/td> 479K
代理商: LM9812
20
http://www.national.com
21
1
0
1
0
1
Reset Pulse Width
Reset Pulse Position
Bit 2
Bit 0
Bit 4
Bit 0
22
1
0
1
1
0
Reference Sample Position
-
-
-
Bit 4
Bit 0
23
1
0
1
1
1
Signal Sample Position
-
-
-
Bit 4
Bit 0
24
1
1
0
0
0
Misc Group 2
Signal
Polarity
Preview 1
Preview 2
Internal/
External
SYNC
pulse
TR Pulse
Mode
(1 or 2
Pulses)
Red/Blue
Order for
2 Output
sensors
3 or 2
Output
sensor
Standard
or
Odd/Even
sensor
25
1
1
0
0
1
Misc Group 3
Power
Down
8 or 10 bit
Coefficient
Bus
-
TR2 Enable TR1 Enable RS Enable
2 Enable
1 Enable
26
1
1
0
1
0
Misc Group 4
Gain
Coefficient
Write
Phase
Offset
Coefficient
Write
Phase
Data Read
Phase
1 Polarity
During TR1
TR2 Pulse
Polarity
TR1 Pulse
Polarity
RS Pulse
Polarity
1/2
Polarity
27
1
1
0
1
1
Test Mode 1
TB7
TB6
0
0
0
0
0
0
28
1
1
1
0
0
Test Mode 2
0
0
0
0
0
0
0
0
Table 2: Configuration Register Parameters
Note:
t
MCLK
= 1/f
MCLK
= 1 MCLK period. Examples given in parenthesis are for f
MCLK
= 24MHz (t
MCLK
= 41.66ns).
Parameter
(Address)
Control Bits
Result
Red
Offset DAC (0)
Green
Offset DAC (1)
Blue
Offset DAC (2)
D5
(SIGN)
0
0
0
0
0
1
1
1
1
1
D4
(MSB)
0
0
0
1
1
0
0
0
1
1
D3
0
0
0
1
1
0
0
0
1
1
D2
0
0
0
1
1
0
0
0
1
1
D1
0
0
1
1
1
0
0
1
1
1
D0
(LSB)
0
1
0
0
1
0
1
0
0
1
Typical Offset
(in ADC LSBs)
0.00
+4.2
+8.4
+126.0
+130.2
0.00
-4.2
-8.4
-126.0
-130.2
Address
(Decimal)
Address
(Binary)
Data Bits
A4 A3 A2 A1 A0
D7
D6
D5
D4
D3
D2
D1
D0
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