參數(shù)資料
型號: LMX2470
廠商: National Semiconductor Corporation
英文描述: 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL
中文描述: 2.6 GHz的Δ-Σ分數(shù)N與800兆赫整數(shù)N分頻PLL鎖相環(huán)
文件頁數(shù): 28/36頁
文件大?。?/td> 453K
代理商: LMX2470
Programming Description
(Continued)
2.3 R2 REGISTER
REGISTER
23
22
21
DATA[19:0] ( Except for the RF_N Register, which is [22:0] )
IF_CPG
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
C3
0
C2
0
C1
1
C0
1
R2
IF_PD
IF_P
IF_N[17:0]
2.3.1 IF_N[16:0] -- IF N Divider Value
The IF N divider is a classical dual modulus prescaler with a selectable 8/9 or 16/17 modulus. The IF_N value is determined by
the IF_A , IF_B, and IF_P values. Note that the IF_P word can assume a value of 8 or 16. The RF_A and RF_B counter values
can be determined in accordance with the following equations.
B = N div P
A = N mod P
B
A is required in order to have a legal N divider ratio
Here the div operator is defined as the division of two numbers with the remainder disregarded and the mod operator is defined
as the remainder as a result of this division. For the purposes of programming, it turns out that the register value is just the binary
representation of the N value, with the exception that the 4
th
LSB is not used and must be programmed to 0 when the 8/9
prescaler is used.
IF_N Programming with the 8/9 Prescaler
N Value
IF_N[16:0]
IF_B
IF_A
<
24
24-55
56
...
65535
N Values Below 24 are prohibited since IF_B
3 is required.
Legal divide ratios in this range are: 24-27, 32-36, 40-45, 48-54
0
0
0
0
0
.
.
.
.
.
1
1
1
1
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
1
.
1
1
.
1
1
.
1
0
0
0
0
.
1
0
.
1
0
.
1
RF_N Programming with 16/17 Prescaler
N Value
IF_N[16:0]
IF_B
IF_A
47
48-239
240
...
131071
N values less than or equal to 47 are prohibited because IF_B
3 is required.
Legal divide ratios in this range are: 48-51, 64-68, 80-85, 96-102
0
0
0
0
0
0
.
.
.
.
.
.
1
1
1
1
1
1
0
.
0
.
1
0
.
1
0
.
1
1
.
1
1
.
1
1
.
1
0
.
1
0
.
1
0
.
1
0
.
1
2.3.2 IF_CPG -- IF Charge Pump Gain
This bit determines the magnitude of the IF charge pump current
IF_CPG
0
1
IF Charge Pump Current (mA)
Low (1 mA)
High (4 mA)
2.3.3 IF_P -- IF Prescaler Value
This bit selects which prescaler will be used for the IF N counter.
IF_P
0
1
IF Prescaler Value
8 (8/9 Prescaler)
16 (16/17 Prescaler)
2.3.4 IF_PD -- IF Power Down Bit
When this bit is set to 0, the IF PLL operates normally. When it is set to 1, the IF PLL powers down and the output of the IF PLL
charge pump is set to a TRI-STATE mode. If the IF_CPT bit is set to 0, then the power down state is synchronous and will not
occur until the charge pump is off. If the IF_CPT bit is set to 1, then the power down will occur immediately regardless of the state
of the IF PLL charge pump.
L
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相關(guān)PDF資料
PDF描述
LMX2470SLEX 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL
LMX2485 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485E 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485ESQ 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485ESQX 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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LMX2470SLEX 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2470SLEX/NOPB 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2471 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3.6 GHz Delta-Sigma Fractional-N PLL with 1.7 GHz Integer-N PLL
LMX2471 WAF 制造商:Texas Instruments 功能描述: