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參數(shù)資料
| 型號(hào)： | LMX3162VBH |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Single Chip Radio Transceiver |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 399K |
| 代理商： | LMX3162VBH |
Receiver Functional Description
(Continued)
Note 18:
The receiver can be powered down, either by hardware through the Rx PD pin, or by software through the programming of F6 bit in the F-Latch. The power
down control method is determined by the settings of F11 and F12 in F-Latch. (Refer to Function Register Programming Description section for details.)
Note 19:
The internal capacitor of the discriminator has a value of 1 pF, and has been optimized for operation at 110 MHz.
Transmitter Functional Description
The simplified block diagram below shows the doubler and voltage regulator for an external transmit gain stage.
Function Register Programming Description (F-Latch)
If the control bits are “1X”, data is transferred from the 20-bit shift register into the 18-bit F-latch. Serial data format is shown
below.
MSB
19
REGISTER’S BIT MAPPING
12
11
10
MODE CONTROL WORD
F12
F11
F10
LSB
18
17
16
15
14
13
9
8
7
6
5
4
3
2
1
0
C2
X
C1
1
F18
F17
F16
F15
F14
F13
F9
F8
F7
F6
F5
F4
F3
F2
F1
Note:
X = Don’t Care Condition
Various modes of operation can be programmed with the function register bits F1–F18, including the phase detector polarity,
charge pump TRI-STATE and CMOS outputs. In addition, software or hardwire power down modes can be specified with bits F11
and F12.
DS100929-5
DS100929-6
Note:
The transmitter can be powered down, either by hardware through the Tx PD pin, or by software through the programming of F7 bith in F-Latch. The
power down control method is determined by the settings of F11 and F12 in F-Latch. (Refer to Function Register Programming Description section for details.)
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| LMX321_06 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad, General-Purpose, Low-Voltage, Rail-to-Rail Output Op Amps |
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