參數(shù)資料
型號(hào): LPC12D27FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: 32-bit ARM Cortex-M0 microcontroller; 128 kB flash and 8 kB SRAM; 4 x 40 segment LCD driver
中文描述: 32位ARM Cortex-M0的微控制器,128KB閃存和8 KB靜態(tài)隨機(jī)存儲(chǔ)器;4×40段LCD驅(qū)動(dòng)器
封裝: LPC12D27FBD100/301<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù): 23/46頁
文件大?。?/td> 371K
代理商: LPC12D27FBD100
LPC12D27
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 20 September 2011
23 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
Conditions: T
amb
= 25
C; active mode entered executing code
while(1){}
from flash; all
peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(3) System oscillator enabled; IRC and system PLL disabled.
Fig 5.
Active mode: Typical supply current I
DD
versus supply voltage V
DD(3V3)
for
different system clock frequencies (all peripherals disabled)
Conditions: V
DD(3V3)
= 3.3 V; active mode entered executing code
while(1){}
from flash; all
peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(3) System oscillator enabled; IRC and system PLL disabled.
Fig 6.
Active mode: Typical supply current I
DD
versus temperature for different system
clock frequencies (peripherals disabled)
V
DD(3V3)
(V)
3
3.6
3.4
3.2
002aag186
8
4
12
16
I
DD
(mA)
0
33 MHz
(2)
24 MHz
(2)
12 MHz
(1)
4 MHz
(3)
1 MHz
(3)
12 MHz
(1)
4 MHz
(3)
1 MHz
(3)
33 MHz
(2)
24 MHz
(2)
002aag023
temperature (°C)
-40
85
35
10
60
-15
4
12
8
16
I
DD
(mA)
0
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