參數(shù)資料
型號: LPC12D27FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: 32-bit ARM Cortex-M0 microcontroller; 128 kB flash and 8 kB SRAM; 4 x 40 segment LCD driver
中文描述: 32位ARM Cortex-M0的微控制器,128KB閃存和8 KB靜態(tài)隨機(jī)存儲器;4×40段LCD驅(qū)動器
封裝: LPC12D27FBD100/301<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù): 30/46頁
文件大?。?/td> 371K
代理商: LPC12D27FBD100
LPC12D27
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 20 September 2011
30 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
10.4 ADC characteristics
Table 9.
T
amb
=
40
C to +85
C unless otherwise specified; ADC frequency 9 MHz, V
DD(3V3)
= 3.0 V to
3.6 V.
Symbol
Parameter
Conditions
V
IA
analog input voltage
C
ia
analog input capacitance
E
D
differential linearity error
E
L(adj)
integral non-linearity
E
O
offset error
E
G
gain error
E
T
absolute error
f
c(ADC)
ADC conversion frequency
R
i
input resistance
[1]
Typical ratings are not guaranteed. The values listed are at room temperature (25
C), nominal supply
voltages.
[2]
Conditions: V
SS
= 0 V, V
DD(3V3)
= 3.3 V.
The ADC is monotonic, there are no missing codes.
[3]
[4]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width.
See
Figure 18
.
[5]
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and
the ideal transfer curve after appropriate adjustment of gain and offset errors. See
Figure 18
.
[6]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the
straight line which fits the ideal curve. See
Figure 18
.
[7]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer
curve after removing offset error, and the straight line which fits the ideal transfer curve. See
Figure 18
.
[8]
The absolute error (E
T
) is the maximum difference between the center of the steps of the actual transfer
curve of the non-calibrated ADC and the ideal transfer curve. See
Figure 18
.
[9]
T
amb
= 25
C; maximum sampling frequency f
s
= 257 kHz and analog input capacitance C
ia
= 1 pF.
[10] Input resistance R
i
depends on the sampling frequency fs: R
i
= 1 / (f
s
C
ia
).
ADC static characteristics
Min
0
-
Typ
[1]
-
-
-
-
-
-
-
-
-
Max
V
DD(3V3)
1
1
2.5
1
3
3
257
3.9
Unit
V
pF
LSB
LSB
LSB
LSB
LSB
kHz
M
[2][3][4]
-
[2][5]
-
[2][6]
-
[2][7]
-
[2][8]
-
-
[9][10]
-
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