參數(shù)資料
型號： LPC1315FBD48,551
廠商： NXP Semiconductors
文件頁數(shù)： 25/77頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 32KB FLASH 48LQFP
標準包裝： 250
系列： LPC13xx
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 72MHz
連通性： I²C，Microwire，SPI，SSI，SSP，UART/USART
外圍設(shè)備： 欠壓檢測/復位，POR，WDT
輸入/輸出數(shù)： 40
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
EEPROM 大小： 2K x 8
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-LQFP
包裝： 托盤
其它名稱： 568-9591
LPC1315_16_17_45_46_47
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 20 September 2012
31 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
7.17.1 Features
Internally resets chip if not periodically reloaded during the programmable time-out
period.
Optional windowed operation requires reload to occur between a minimum and
maximum time period, both programmable.
Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect feed sequence causes reset or interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (Tcy(WDCLK) 256 4) to (Tcy(WDCLK) 224 4) in
multiples of Tcy(WDCLK) 4.
The Watchdog Clock (WDCLK) source can be selected from the IRC or the watchdog
oscillator (WDO). This gives a wide range of potential timing choices of watchdog
operation under different power conditions.
7.18 Clocking and power control
7.18.1 Integrated oscillators
The LPC1315/16/17/45/46/47 include three independent oscillators. These are the
system oscillator, the Internal RC oscillator (IRC), and the watchdog oscillator. Each
oscillator can be used for more than one purpose as required in a particular application.
Following reset, the LPC1315/16/17/45/46/47 will operate from the internal RC oscillator
until switched by software. This allows systems to operate without any external crystal and
the bootloader code to operate at a known frequency.
See Figure 9 for an overview of the LPC1315/16/17/45/46/47 clock generation.
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