參數(shù)資料
型號(hào): LPC1343FBD48,151
廠商: NXP Semiconductors
文件頁數(shù): 2/74頁
文件大小: 0K
描述: IC MCU 32BIT 32KB FLASH 48LQFP
產(chǎn)品培訓(xùn)模塊: LPCXpresso
特色產(chǎn)品: LPC1300 Series Cortex-M3 MCUs
標(biāo)準(zhǔn)包裝: 250
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 40
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
配用: 622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名稱: 568-4945
935289652151
LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
10 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
6.2 Pin description
Table 3.
LPC1313/42/43 LQFP48 pin description table
Symbol
Pin
Start
logic
input
Type Reset
state
Description
RESET/PIO0_0
yes
I
I; PU
RESET — External reset input with 20 ns glitch filter. A LOW-going
pulse as short as 50 ns on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0.
I/O
-
PIO0_0 — General purpose digital input/output pin with 10 ns glitch
filter.
PIO0_1/CLKOUT/
CT32B0_MAT2/
USB_FTOGGLE
yes
I/O
I; PU
PIO0_1 — General purpose digital input/output pin. A LOW level on
this pin during reset starts the ISP command handler or the USB
device enumeration (USB on LPC1342/43 only, see description of
PIO0_3).
O-
CLKOUT — Clockout pin.
O-
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
O-
USB_FTOGGLE — USB 1 ms Start-of-Frame signal (LPC1342/43
only).
PIO0_2/SSEL0/
CT16B0_CAP0
I/O
I; PU
PIO0_2 — General purpose digital input/output pin.
I/O
-
SSEL0 — Slave select for SSP0.
I-
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3/USB_VBUS
14[3] yes
I/O
I; PU
PIO0_3 — General purpose digital input/output pin. LPC1342/43
only: A LOW level on this pin during reset starts the ISP command
handler, a HIGH level starts the USB device enumeration.
I-
USB_VBUS — Monitors the presence of USB bus power
(LPC1342/43 only).
PIO0_4/SCL
15[4] yes
I/O
I; IA
PIO0_4 — General purpose digital input/output pin (open-drain).
I/O
-
SCL — I2C-bus clock input/output (open-drain). High-current sink
only if I2C Fast-mode Plus is selected in the I/O configuration
register.
PIO0_5/SDA
16[4] yes
I/O
I; IA
PIO0_5 — General purpose digital input/output pin (open-drain).
I/O
-
SDA — I2C-bus data input/output (open-drain). High-current sink
only if I2C Fast-mode Plus is selected in the I/O configuration
register.
PIO0_6/
USB_CONNECT/
SCK0
I/O
I; PU
PIO0_6 — General purpose digital input/output pin.
O-
USB_CONNECT — Signal used to switch an external 1.5 k
Ω
resistor under software control. Used with the SoftConnect USB
feature (LPC1342/43 only).
I/O
-
SCK0 — Serial clock for SSP0.
PIO0_7/CTS
I/O
I; PU
PIO0_7 — General purpose digital input/output pin (high-current
output driver).
I-
CTS — Clear To Send input for UART.
PIO0_8/MISO0/
CT16B0_MAT0
I/O
I; PU
PIO0_8 — General purpose digital input/output pin.
I/O
-
MISO0 — Master In Slave Out for SSP0.
O-
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
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