參數(shù)資料
型號: LPC2210
廠商: NXP Semiconductors N.V.
英文描述: 16/32-bit ARM microcontroller with 10-bit ADC and external memory interface
中文描述: 與10位ADC和外部存儲器接口16/32位ARM微控制器
文件頁數(shù): 10/39頁
文件大?。?/td> 181K
代理商: LPC2210
Philips Semiconductors
LPC2210
16/32-bit ARM microcontrollers with external memory interface
Preliminary data
Rev. 01 — 09 February 2004
10 of 39
9397 750 12872
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P3.20
P3.21
P3.22
P3.23
45
44
41
40
O
O
O
O
O
O
A20 —
External memory address line 20.
A21 —
External memory address line 21.
A22 —
External memory address line 22.
A23 —
External memory address line 23.
XCLK —
Clock output.
CS3 —
Low-active Chip Select 3 signal.
P3.24
36
(Bank 3 addresses range 8300 0000 - 83FF FFFF)
CS2 —
Low-active Chip Select 2signal.
P3.25
35
O
(Bank 2 addresses range 8200 0000 - 82FF FFFF)
CS1 —
Low-active Chip Select 1 signal.
P3.26
30
O
(Bank 1 addresses range 8100 0000 - 81FF FFFF)
WE —
Low-active Write enable signal.
BLS3 —
Low-active Byte Lane Select signal (Bank 3).
AIN7 —
A/D converter, input 7. This analog input is always connected to its
pin.
BLS2 —
Low-active Byte Lane Select signal (Bank 2).
AIN6 —
A/D converter, input 6. This analog input is always connected to its
pin.
BLS1 —
Low-active Byte Lane Select signal (Bank 1).
BLS0 —
Low-active Byte Lane Select signal (Bank 0).
Pin not connected.
External Reset input:
A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Ground:
0 V reference.
P3.27
P3.28
29
28
O
O
I
P3.29
27
O
I
P3.30
P3.31
NC
RESET
97
96
22
135
O
O
I
XTAL1
XTAL2
V
SS
142
141
3, 9, 26, 38,
54, 67, 79,
93, 103, 107,
111, 128
139
I
O
I
V
SSA
I
Analog Ground:
0 V reference. This should nominally be the same voltage
as V
SS
, but should be isolated to minimize noise and error.
PLL Analog Ground:
0 V reference. This should nominally be the same
voltage as V
SS
, but should be isolated to minimize noise and error.
1.8 V Core Power Supply:
This is the power supply voltage for internal
circuitry.
Analog 1.8 V Core Power Supply:
This is the power supply voltage for
internal circuitry. This should be nominally the same voltage as V
18
but should
be isolated to minimize noise and error.
3.3 V Pad Power Supply:
This is the power supply voltage for the I/O ports.
V
SSA_PLL
138
I
V
18
37, 110
I
V
18A
143
I
V
3
2, 31, 39, 51,
57, 77, 94,
104, 112, 119
14
I
V
3A
I
Analog 3.3 V Pad Power Supply: This should be nominally the same voltage
as V
3
but should be isolated to minimize noise and error.
Table 3:
Symbol
Pin description
…continued
Pin
Type
Description
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