參數(shù)資料
型號: LPC2362FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學處理器
英文描述: Single-chip 16-bit-32-bit MCU; up to 128 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝: LPC2361FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;LPC2362FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.htm
文件頁數(shù): 43/64頁
文件大小: 475K
代理商: LPC2362FBD100
LPC2361_62
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 25 October 2011
43 of 64
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
11. Dynamic characteristics
[1]
Parameters are valid over operating temperature range unless otherwise specified.
[2]
Typical ratings are not guaranteed. The values listed are at room temperature (25
C), nominal supply voltages.
[3]
Bus capacitance C
b
in pF, from 10 pF to 400 pF.
Table 8.
T
amb
=
40
C to +85
C for commercial applications; V
DD(3V3)
over specified ranges.
[1]
Symbol
Parameter
ARM processor clock frequency
f
oper
operating frequency
Dynamic characteristics
Conditions
Min
Typ
[2]
Max
Unit
CCLK;
40
C to +85
C
IRC;
40
C to +85
C
1
3.96
-
4
72
4.04
MHz
MHz
External clock
f
osc
T
cy(clk)
t
CHCX
t
CLCX
t
CLCH
t
CHCL
I
2
C-bus pins (P0[27] and P0[28])
t
f(o)
SSP interface
t
su(SPI_MISO)
oscillator frequency
clock cycle time
clock HIGH time
clock LOW time
clock rise time
clock fall time
1
42
T
cy(clk)
0.4
T
cy(clk)
0.4
-
-
-
-
-
-
-
-
25
1000
-
-
5
5
MHz
ns
ns
ns
ns
ns
output fall time
V
IH
to V
IL
20 + 0.1
C
b
[3]
-
-
ns
SPI_MISO set-up time
T
amb
= 25
C; measured
in SPI Master mode; see
Figure 14
-
11
-
ns
Fig 12. External clock timing (with an amplitude of at least V
i(RMS)
= 200 mV)
t
CHCL
t
CLCX
t
CHCX
t
CLCH
T
cy(clk)
002aaa907
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