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參數(shù)資料
| 型號： | LPC2378FBD144 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | Single-chip 16-bit-32-bit microcontrollers; 512 kB flash with ISP-IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC-DAC |
| 封裝： | LPC2377FBD144<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;LPC2378FBD144<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.htm |
| 文件頁數(shù)： | 27/68頁 |
| 文件大?。?/td> | 1443K |
| 代理商： | LPC2378FBD144 |
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LPC2377_78
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 17 June 2010
27 of 68
NXP Semiconductors
LPC2377/78
Single-chip 16-bit/32-bit microcontrollers
7.19.1
Features
I
2
C0 is a standard I
2
C compliant bus interface with open-drain pins.
I
2
C1 and I
2
C2 use standard I/O pins and do not support powering off of individual
devices connected to the same bus lines.
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
2
C-bus can be used for test and diagnostic purposes.
7.20 I
2
S-bus serial I/O controllers
The I
2
S-bus provides a standard communication interface for digital audio applications.
The I
2
S-bus specification defines a 3-wire serial bus using one data line, one clock line,
and one word select signal. The basic I
2
S connection has one master, which is always the
master, and one slave. The I
2
S interface on the LPC2377/78 provides a separate transmit
and receive channel, each of which can operate as either a master or a slave.
7.20.1
Features
The interface has separate input/output channels each of which can operate in master
or slave mode.
Capable of handling 8-bit, 16-bit, and 32-bit word sizes.
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 48 kHz ((16, 22.05, 32, 44.1,
48) kHz).
Configurable word select period in master mode (separately for I
2
S input and output).
Two 8 word FIFO data buffers are provided, one for transmit and one for receive.
Generates interrupt requests when buffer levels cross a programmable boundary.
Two DMA requests, controlled by programmable buffer levels. These are connected
to the GPDMA block.
Controls include reset, stop and mute options separately for I
2
S input and I
2
S output.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2378FBD144,551 | 功能描述:ARM微控制器 - MCU ARM7 512KF/USB/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2378FBD144/CP32 | 制造商:NXP Semiconductors 功能描述:- Trays |
| LPC2378FBD144/CP3E | 制造商:NXP Semiconductors 功能描述: |
| LPC2378FBD144551 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU ARM7 72MHZ LQFP-144 |
| LPC2378-STK | 功能描述:開發(fā)板和工具包 - ARM DEV BRD FOR LPC2378 512KB FLASH 16KB RAM RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
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