參數(shù)資料
型號: LPC2923FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁數(shù): 40/84頁
文件大小: 551K
代理商: LPC2923FBD100
LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
40 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
6.14.7.1
Pin description
The QEI module in the MSCSS has the following pins. These are combined with other
functions on the port pins of the LPC2921/2923/2925.
Table 23
shows the QEI pins.
Table 23.
Symbol
QEI0 PHA
Remark:
The index function for the QEI is not pinned out on the LPC2921/2923/2925.
6.14.7.2
Clock description
The QEI module is clocked by CLK_MSCSS_QEI, see
Section 6.7.2
. The frequency of
this clock is identical to CLK_MSCSS_APB since they are derived from the same base
clock BASE_MSCSS_CLK.
If the QEI is not used its CLK_MSCSS_QEI branch clock can be switched off.
6.15 Power, Clock, and Reset control SubSystem (PCRSS)
The Power, Clock, and Reset control SubSystem (PCRSS) in the LPC2921/2923/2925
includes a Clock Generator Unit (CGU), a Reset Generator Unit (RGU) and a Power
Management Unit (PMU).
Figure 8
provides an overview of the PCRSS. An AHB-to-DTL bridge controls the
communication with the AHB system bus.
QEI pins
Pin name
PHA0
Direction
IN
Description
Sensor signal. Corresponds to PHA in
quadrature mode and to direction in
clock/direction mode.
Sensor signal. Corresponds to PHB in
quadrature mode and to clock signal in
clock/direction mode.
QEI0 PHB
PHB0
IN
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