參數(shù)資料
型號: LPC2926FBD144
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT486-1, LQFP-144
文件頁數(shù): 51/95頁
文件大?。?/td> 1855K
代理商: LPC2926FBD144
LPC2926_27_29
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 28 September 2010
51 of 95
NXP Semiconductors
LPC2926/2927/2929
ARM9 microcontroller with CAN, LIN, and USB
There are two primary clock generators: a low-power ring oscillator (LP_OSC) and a
crystal oscillator. See
Figure 12
.
LP_OSC is the source for the BASE_PCR_CLK that clocks the CGU0 itself and for
BASE_SAFE_CLK that clocks a minimum of other logic in the device (like the watchdog
timer). To prevent the device from losing its clock source LP_OSC cannot be put into
power-down. The crystal oscillator can be used as source for high-frequency clocks or as
an external clock input if a crystal is not connected.
Secondary clock generators are a PLL and seven fractional dividers (FDIV[0:6]). The PLL
has three clock outputs: normal, 120
°
phase-shifted and 240
°
phase-shifted.
Fig 12. Block diagram of the CGU0 (see
Table 27
for all base clocks)
400 kHz LP_OSC
PLL
FDIV0
EXTERNAL
OSCILLATOR
FDIV1
FDIV6
OUT 0
OUT 1
OUT 11
002aae147
clkout
clkout120
clkout240
CLOCK GENERATION UNIT (CGU0)
FREQUENCY
MONITOR
CLOCK
DETECTION
AHB TO DTL BRIDGE
BASE_SYS_CLK
BASE_ICLK1_CLK
OUT 3
BASE_IVNSS_CLK
OUT 2
BASE_PCR_CLK
BASE_SAFE_CLK
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