參數(shù)資料
型號: LPC3240FET296/01,5
廠商: NXP Semiconductors
文件頁數(shù): 6/57頁
文件大?。?/td> 0K
描述: IC ARM9 MCU 256K 296-TFBGA
標(biāo)準(zhǔn)包裝: 126
系列: LPC3200
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 266MHz
連通性: EBI/EMI,以太網(wǎng),I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,電機控制 PWM,PWM,WDT
輸入/輸出數(shù): 51
程序存儲器類型: ROMless
RAM 容量: 256K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 296-TFBGA
包裝: 托盤
其它名稱: 568-4963
935290765551
LPC3220_30_40_50
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 October 2011
14 of 79
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
GPI_7/CAP4[0]/
MCABORT
D13
VDD_IOD
I
General purpose input 7
I
Timer 4 capture input 0
I
Motor control PWM LOW-active fast abort input
GPI_8/KEY_COL6/
SPI2_BUSY/
ENET_RX_DV
B16
VDD_IOD
I
General purpose input 8
I
Keyscan column 6 input
I
SPI2 busy input
I
Ethernet receive data valid input (LPC3240 and
LPC3250 only)
GPI_9/KEY_COL7/
ENET_COL
E12
VDD_IOD
I
General purpose input 9
I
Keyscan column 7 input
I
Ethernet collision input (LPC3240 and LPC3250
only)
GPI_19/U4_RX
B15
VDD_IOD
I
General purpose input 19
I
UART 4 receive
GPI_28/U3_RI
N17
VDD_IOA
I
General purpose input 28
I
UART 3 ring indicator input
GPIO_0
A12
VDD_IOD
I/O
General purpose input/output 0
GPIO_1
A11
VDD_IOD
I/O
General purpose input/output 1
GPIO_2/
KEY_ROW6/
ENET_MDC
D9
VDD_IOD
I/O
General purpose input/output 2
O
Keyscan row 6 output
O
Ethernet PHY interface clock (LPC3240 and
LPC3250 only)
GPIO_3/
KEY_ROW7/
ENET_MDIO
C11
VDD_IOD
I/O
General purpose input/output 3
I/O
Keyscan row 7 output
I/O
Ethernet PHY interface data (LPC3240 and
LPC3250 only)
GPIO_4/
SSEL1/
LCDVD[22]
B11
VDD_IOD
I/O
General purpose input/output 4
I/O
SSP1 Slave Select
I/O
LCD data bit 22 (LPC3230 and LPC3250 only)
GPIO_5/
SSEL0/
MCI0
E9
VDD_IOD
I/O
General purpose input/output 5
I/O
SSP0 Slave Select
I/O
Motor control channel 0 input
GPO_0/
TST_CLK1
C3
VDD_IOC
O
General purpose output 0
O
Test clock 1 out
GPO_1
D4
VDD_IOC
O
General purpose output 1
GPO_2/
MAT1[0]/
LCDVD[0]
B14
VDD_IOD
O
General purpose output 2
O
Timer 1 match output 0
O
LCD data bit 0 (LPC3230 and LPC3250 only)
GPO_3/
LCDVD[1]
D12
VDD_IOD
O
General purpose output 3
O
LCD data bit 1 (LPC3230 and LPC3250 only)
GPO_4
D8
VDD_IOB
O
General purpose output 4
Table 4.
Pin description …continued
Symbol
Pin
Power supply
domain
Type
Description
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